Make AArch64FastISel::EmitIntExt explicitly check its source and destination types

This is a follow up to r212492. There should be no functional difference, but
this patch makes it clear that SrcVT must be an i1/i8/16/i32 and DestVT must be
an i8/i16/i32/i64.

rdar://17516686

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212633 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] AVX512: Enable it in the Loop Vectorizer

This lets us experiment with 512-bit vectorization without passing
force-vector-width manually.

The code generated for a simple integer memset loop is properly vectorized.
Disassembly is still broken for it though :(.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212634 91177308-0d34-0410-b5e6-96231b3b80d8
Update ReleaseNotes to mention Atomic NAND semantic changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212635 91177308-0d34-0410-b5e6-96231b3b80d8