axivdma: xilinx: Remove irq_dispose_mapping() as it is not required

This patch removes the call irq_dispose_mapping() as in the code
we are not mapping the interrupt using create_mapping().  This
patch fixes the kernel crash when unloading this driver module.

Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
mmc: Synchronize with arasan mainline version

Keep our kernel compatible with the latest arasan mmc
driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynq: dtses: Remove pl330 primecell-preiphid

zynq doesn't require to rewrite this ID.
pl330 is detected automatically.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynq: clk: Move topswitch code from PM driver

This is purely clock code and should be in clock driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynq: pm: Sort headers

Trivial fix.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm: dt: zynq: Add dts for cc108

Add a dts file for the cc108 Zynq based platform.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynq: dtses: Fix usb, enet and i2c reset description

Origin MIO connection just pointed to ps7_gpio controller
which is handling it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynq: slcr: Introduce new get_ocm_config()

This function will be used by OCM driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynq: Add OCM driver

The driver provide memory allocator which can
be used by others drivers to allocate memory inside OCM.
All location for 64kB blocks are supported
and driver is trying to allocate the largest continuous
block of memory.

Checking mpcore addressing filterring is not done here
but could be added in future.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynq: ocm: Enable generic allocator by default

Enable generic allocator by default and update defconfigs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
axivdma: Documentation: devicetree: Updated device tree bindings with mandatory entries

As 'xlnx,num-fstores' and 'xlnx,device-id' are mandatory device tree
properties the driver is expecting, these entries should be listed
in the bindings.

Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
vdmatest: xilinx: Zero out the configuration fields before configuring VDMA

The existing VDMA test client is failing to work with latest VDMA driver,
as some of the configuration fields of configuration structure are non-zero
and hence VDMA engine is not configured properly.  So this patch fixes
the issue.

Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: zynq-qspi: Use readl_/writel_relaxed functions instead of readl/writel

Since the qspi register space configured as device memory and the order of
accesses arriving at Device memory is guaranteed to correspond to the program
order of instructions which access Strongly-ordered or Device memory.
The readl/writel function contains a barrier and adding more delay while
accessing the data from the fifo registers

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: zynq-qspi: Use autostart mode and avoid fifo status checks

For better throughput, always use manual chipselect and autostart mode and also
avoid fifo status check while accessing the fifo.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: zynq-qspi: Avoid temp variables used in fifo read/write operations

For better throughput, Avoid temporary variable for storing the fifo data and
copying to user buffer and vice versa, Instead of that use the buffer directly

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: zynq-qspi: Improve the transfer rate

The following sequence is used to keep spi bus busy and transfer rate
1. Configure the Rx threshold register with optimum value
2. Fill the complete Tx fifo
3. Wait for the Rx fifo not empty or Tx fifo empty condition
4. Read data from the Rx fifo for Rx threshold entries or requested
   no of bytes if the outstanding bytes are less than the threshold
5. Fill the Tx fifo with Rx threshold entries or requested no of
   bytes if the outstanding bytes are less than the threshold
6. Repeat step 2

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
dma: axi-dmac: Add MEM to DEV support

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
usb: xusbps: Clear the endpoint complete event after each dTD processing

Clear the endpoint complete event status after prcoessing the dTDs that are
marked as completed in the current queue. This change is required to reduce
the false interrupts that may occur due to processing the all the completed
dTDs in the ISR though the isr is meant for the single dTD complete event.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
net: xilinx_emacps: Apply the spinlock to the required critical section

Applied the spinlock to the required critical sections in xemacps_tx_poll
and xemacps_start_xmit function. Removed the barrier instructions that exist
just before the spinlock calls and the places where the usage of barrier
instrcution is not relevant.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
net: xilinx_emacps: Simplified the cleanup logic for fragmented packets

The following changes simplify the fragmented packet and buffer descriptor
cleanup process by eliminating the redundant while loop

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>