Create FBSL.

Now,  you need package both prebuilt and image, for JTAG test.
However, you need FSBL to engage first stage boot.
Please refer http://www.wiki.xilinx.com/Zc702+Boot+From+Flash.
It helps you to understand the Zynq boot flow.

Create a new Application Project.
 - Project name: fsbl_0
 - OS Platform: standalone
 - Board Support Package: standalone_bsp_0

In next page, choose Zynq FSBL as Template.

The suffix _0 may helps you to identify what HW design revision. I suggest you to use the rule.