DSP: Fixes behaviour for audio dmas of length 0

This behaviour was tested on a real (wii) console.
DSP: Do updates to DSP interrupt bits asap

This was being scheduled on the next possible event, which caused
timing issues (in FFCC, AI interrupt would fire before DSP interrupt)
DSP: Add minor delay to initial AIDMA interrupt

When AIDMA begins, the first thing it does is load the source address
and length into internal registers. It then triggers the AID interrupt.
Some begin the AIDMA process without all the data necessary for the
interrupt callback being set up already - they require a few more cycles
to set it up (the delay between the DMA being set to begin and the
interrupt firing). The value of this delay was approximated by tests on real
hardware.
Merge pull request #762 from booto/dma-audio-3

DSP: DMA behaviour adjustments to fix regressions
output timing info for cl/link
Windows: Give SCMRevGen a configuration for x64 instead of Win32.
Windows: Use "OldStyle" (cl /Z7) debug information.
This places intermediate debug info generated during build
into the respective object files instead of a single pdb.
The output debug info from link is still in a single pdb.
Remove stdafx files