2014-09-19  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Back port from trunk:
	2014-09-19  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/predicates.md (fusion_gpr_mem_load): Move testing
	for base_reg_operand to be common between LO_SUM and PLUS.
	(fusion_gpr_mem_combo): New predicate to match a fused address
	that combines the addis and memory offset address.

	* config/rs6000/rs6000-protos.h (fusion_gpr_load_p): Change
	calling signature.
	(emit_fusion_gpr_load): Likewise.

	* config/rs6000/rs6000.c (fusion_gpr_load_p): Change calling
	signature to pass each argument separately, rather than
	using an operands array.  Rewrite the insns found by peephole2 to
	be a single insn, rather than hoping the insns will still be
	together when the peephole pass is done.  Drop being called via a
	normal peephole.
	(emit_fusion_gpr_load): Change calling signature to be called from
	the fusion_gpr_load_<mode> insns with a combined memory address
	instead of the peephole pass passing the addis and offset
	separately.

	* config/rs6000/rs6000.md (UNSPEC_FUSION_GPR): New unspec for GPR
	fusion.
	(power8 fusion peephole): Drop support for doing power8 via a
	normal peephole that was created by the peephole2 pass.
	(power8 fusion peephole2): Create a new insn with the fused
	address, so that the fused operation is kept together after
	register allocation is done.
	(fusion_gpr_load_<mode>): Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215405 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215441 138bc75d-0d04-0410-961f-82ee72b054a4
	PR debug/63328
	* omp-low.c (ipa_simd_modify_stmt_ops): For debug stmts
	insert a debug source bind stmt setting DEBUG_EXPR_DECL
	instead of a normal gimple assignment stmt.

	* c-c++-common/gomp/pr63328.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215455 138bc75d-0d04-0410-961f-82ee72b054a4
	PR c++/63323
	* ubsan.c (is_ubsan_builtin_p): Turn assert into a condition.

	* g++.dg/ubsan/pr61272.C: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215459 138bc75d-0d04-0410-961f-82ee72b054a4
	PR c++/61465
	* call.c (convert_like_real) [ck_identity]: Call mark_rvalue_use
	after pulling out an element from a CONSTRUCTOR.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215476 138bc75d-0d04-0410-961f-82ee72b054a4
/cp
2014-09-22  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/62219
	* pt.c (check_default_tmpl_args): Check LAMBDA_FUNCTION_P.

/testsuite
2014-09-22  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/62219
	* g++.dg/cpp0x/lambda/lambda-template14.C: New.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215483 138bc75d-0d04-0410-961f-82ee72b054a4
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debug/elf: support arm64 relocations

Backport https://codereview.appspot.com/132000043 to GCC 4.9 branch.

user:        Michael Hudson-Doyle <michael.hudson@linaro.org>

This adds the minimal support for AArch64/arm64 relocations
needed to get cgo to work (when an isomorphic patch is applied
to gccgo) and a test.

This change uses the "AAarch64" name for the architecture rather
than the more widely accepted "arm64" because that's the name that
the relevant docs from ARM such as

   http://infocenter.arm.com/help/topic/com.arm.doc.ihi0056b/IHI0056B_aaelf64.pdf

all use.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215492 138bc75d-0d04-0410-961f-82ee72b054a4
2014-09-23  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.md (f32_vsx): New mode attributes to
	refine the constraints used on 32/64-bit floating point moves.
	(f32_av): Likewise.
	(f64_vsx): Likewise.
	(f64_dm): Likewise.
	(f64_av): Likewise.
	(BOOL_REGS_OUTPUT): Use wt constraint for TImode instead of wa.
	(BOOL_REGS_OP1): Likewise.
	(BOOL_REGS_OP2): Likewise.
	(BOOL_REGS_UNARY): Likewise.
	(mov<mode>_hardfloat, SFmode/SDmode): Tighten down constraints for
	32/64-bit floating point moves.  Do not use wa, instead use ww/ws
	for moves involving VSX registers.  Do not use constraints that
	target VSX registers for decimal types.
	(mov<mode>_hardfloat32, DFmode/DDmode): Likewise.
	(mov<mode>_hardfloat64, DFmode/DDmode): Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215522 138bc75d-0d04-0410-961f-82ee72b054a4
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	PR c++/63249
	* semantics.c (handle_omp_array_sections_1): Call mark_rvalue_use
	on low_bound and length.

	* g++.dg/gomp/pr63249.C: New test.
	* c-c++-common/gomp/pr63249.c: New test.

2014-09-25  Thomas Schwinge  <thomas@codesourcery.com>

	PR c++/63249
	* c-parser.c (c_parser_omp_variable_list): Call mark_exp_read
	on low_bound and length.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215581 138bc75d-0d04-0410-961f-82ee72b054a4
	PR tree-optimization/63341
	* tree-vectorizer.h (vect_create_data_ref_ptr,
	vect_create_addr_base_for_vector_ref): Add another tree argument
	defaulting to NULL_TREE.
	* tree-vect-data-refs.c (vect_create_data_ref_ptr): Add byte_offset
	argument, pass it down to vect_create_addr_base_for_vector_ref.
	(vect_create_addr_base_for_vector_ref): Add byte_offset argument,
	add that to base_offset too if non-NULL.
	* tree-vect-stmts.c (vectorizable_load): Add byte_offset variable,
	for dr_explicit_realign_optimized set it to vector byte size
	- 1 instead of setting offset, pass byte_offset down to
	vect_create_data_ref_ptr.

	* gcc.dg/vect/pr63341-1.c: New test.
	* gcc.dg/vect/pr63341-2.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215585 138bc75d-0d04-0410-961f-82ee72b054a4
[gcc]

2014-09-25  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR target/63335
	* config/rs6000/rs6000-c.c (altivec_build_resolved_builtin):
	Exclude VSX_BUILTIN_XVCMPGEDP_P from special handling.

[gcc/testsuite]

2014-09-25  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR target/63335
	* gcc.target/powerpc/pr63335.c: New test.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215603 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/
	Backport from mainline
	2014-09-25  Nick Clifton  <nickc@redhat.com>
	2014-09-25  Oleg Endo  <olegendo@gcc.gnu.org>

	PR target/62218
	* config/sh/sync.md (atomic_fetch_nand<mode>_soft_imask,
	atomic_test_and_set_soft_imask): Fix typo in instruction sequence.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215608 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215625 138bc75d-0d04-0410-961f-82ee72b054a4
	* g++.dg/compat/struct-layout-1_generate.c: Add -Wno-abi
	to default options.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215636 138bc75d-0d04-0410-961f-82ee72b054a4