k20::uart: Initial commit
lpc17xx::uart: Shuffle register constants
cortex_m0: Add missing mod.rs
Share systick between cortex_m*
systick: Note that not all implementations support CALIBRATED
blink_k20: Initial commit
systick: Mark reg as public
cortex_m4/mod.rs: Add documentation
cortex_m0/mod.rs: Add documentation
Share mpu between m3 and m4
Share nvic between m0, m3 and m4
Share scb between m0, m3, and m4
queue: Add comments
k20::i2c: Initial commit
k20::lptmr: initial commit
Reexport hal::cortex_m* as hal::arch

This allows us to easily generalize over architecture.
HACK: Use cortex_m3 sched and lock
Add *.rse to .gitignore