[DRIVERS] Adding MXC GPIO driver.

This driver is required by the i.MX SPI driver.
For now, I tried not to use the IRQ domains, and avoid the generic GPIO driver.
This driver cannot be tested yet.
[ARM] Correcting GPIO3 IRQ line definition.

Xvisor device tree format is slightly different from Linux's one.
The IRQ should be written as plain number, and not without specifying the
sharing flag nor the interrupt type.
This although can be written with these specifiers (modifying the driver
accordingly), but it would break Xvisor device tree format.

Also, the IRQ number is the IRQ line, without the 32 base IRQ offset.
[ARM] Adding the ARCH_MXC definition.

This definition is used by i.MX platform driver configuration, to ensure the
platform set is an i.MX one.
[CORE] Adding error number definitions.

The SPI driver requires some error numbers that were not yet defined.
[CORE] Adding the nano delay loop.

The nano delay loop is required by the GPIO bitbanging SPI driver.
[DRIVERS] SPI driver added.
[DRIVERS] SPI GPIO bitbanging driver added.

This driver is required by the i.MX SPI driver.
[DRIVERS] i.MX SPI driver added.

This is the i.MX SPI driver required by the Sabre Lite NOR flash driver.
This driver have not been tested yet.
[ARM] Moving the GPIO3 declaration in the i.MX6 device tree.

Since the device are initialized in the device tree order, and that the ECSPI
device driver is using the GPIO3 device, the latter must be declared before
the ECSPI devices in the device tree.
[ARM] Correcting the i.MX Sabre Lite NOR flash name.
[DRIVERS] Using Generic GPIO for the i.MX GPIO driver.

As the Generic GPIO driver is already ported on Xvisor, using it will help the
port of the i.MX GPIO driver, especially the mapping between the IRQ and the
GPIO pin indexing.
[DRIVERS] Correcting the SPI master driver.

Disabled SPI master driver code used by the i.MX SPI driver has been
uncommented.

A core function has been added, similar to the "vmm_devdrv_bus_find_device"
function, but from a class, named "vmm_devdrv_class_find_dev"
("vmm_devdrv_class_find_device" already exists), that call an argument-passed
function for all device registered in a class and return the device for which
this function returns a non-zero value.

This function is used by the SPI master driver to find a SPI controller device
on a specific bus.
Thus, we can now register a SPI controller device on a bus, and find it back.
[DRIVERS] Registering the i.MX SPI master driver, with a bus id.

The i.MX ECSPI controller driver bus id is found from its physical register
base address (see the mapping in the comments).
This only works for Sabre Lite for now, as the mapping would change on other
board.
[DRIVERS] Correcting the i.MX SPI driver interruption activation.

The XCH bit should be set after enabling the ECSPI interrupt, as described in
the datasheet.
[CORE] Calling the udiv64 function, instead of using the division operator.
[DRIVERS] Starting the Sabre Lite SPI NOR flash driver port.

This drivers requires a bus id to be set in the parent device node, otherwise,
the bus id will be set as the bus id 0.
[DRIVERS] Missing MTD initialization added.

The MTD class was not registered and initialized, leading to an uncorrect lock
of the class when registering a MTD device.
The MTD layer is now a module, which init code is the class registration.
[DRIVERS] Continuing the M25P80 Flash driver.

Continuing the M25P80 Flash driver, completing the probe function.
[ARM] Improving i.MX clock management.

The root clocks now read their fixed rate from the device tree.
This allows to update the rate of all the clocks in the whole clock tree.
A function to get a clock from its name have also been added.
[ARM] Setting root clock rate.

The root clocks have now their rate fixed, in order to spread clock rates
through the whole clock tree.