vc4: Fix assumption of TGSI OUT[0] being POSITION in the VS.

All the shaders we've received so far had this be the case, but with
nir-to-tgsi that changed.

I might decide to make nir-to-tgsi keep the outputs in the same order, for
debugging sanity, but I'm not sure.
vc4: Avoid reusing a pointer from c->outputs[] after add_output().

add_output() can resize the qreg array, so we might use a stale pointer.
i915g: we also have more than 0 viewports!

See 546d6c8d for the corresponding fix in freedreno.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Stephane Marchesin <stephane.marchesin@gmail.com>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
llvmpipe: Call pipe_thread_wait() on Linux.

To address http://lists.freedesktop.org/archives/mesa-dev/2014-November/070569.html

In short, revert 706ad3b649e6a75fdac9dc9acc3caa9e6067b853 for non-Windows
OSes.
linker: Add a missing space in an error message

Reviewed-by: Brian Paul <brianp@vmware.com>
i915: Fix GL_DOT3_RGBA a bit

The spec says using DOT4 for alpha is undefined unless DOT4 is also used
for color. It seems to do the right thing anyway, but better safe than sorry.

Also override numAlphaArgs to 2 for DOT4 since that's what it wants.
This migth fix something in case the specified alpha mode has only one
argument. Also avoids emitting a needless 3DSTATE_MAP_BLEND_ARG if
the specified alpha mode has three arguments.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
i915: Use L8A8 instead of I8 to simulate A8 on gen2

Gen2 doesn't support the A8 texture format. Currently the driver
substitutes it with I8, but that results in incorrect RGB values.
Use A8L8 instead. We end up wasting a bit of memory, but at least
we should get the correct results.

v2: Handle the fallback in _mesa_choose_tex_format() and also
    do it for all alpha formats that currently accept A8

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72819
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80050
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38873
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
i915: Override mip filter to nearest with aniso

gen2 doesn't supporte linear mip filter with anisotropic min/mag
filtering. The hardware would automagically downgrade the min/mag
filters to linear in such cases, which IMO looks worse than forcing
the mip filter to nearest.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
i915: Accept GL_DEPTH_STENCIL GL_DEPTH_COMPONENT formats for renderbuffers

Gen2 doesn't support depth/stencil textures, and since

 commit c1d4d4999303f9167b20f4e0674b9436e6295cf7
 Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
 Date:   Thu Apr 24 14:11:43 2014 +0300

    i915: Don't advertise Z formats in TextureFormatSupported on gen2

depth/stencil formats are no longer accepted as texture formats.
However we still want depth/stencil renderbuffers, so add explicit
format checks to intel_alloc_renderbuffer_storage() to allow such
things.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
i915: Kill intel_context::hw_stencil

ctx.hw_stencil is not used anywhere so kill it.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
i915: Protect macro argument for TEXTURE_SET()

TEXTURE_SET() is the only register macro that forgets to wrap the
argument evaluation in parens. Only simple integers are passed to this
macro so there's no bug but sitll it seems prudent to add the
parens.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
i915: Don't call _mesa_meta_glsl_Clear() on gen2

Gen2 doesn't have fragment shaders so we shouldn't be calling
_mesa_meta_glsl_Clear() on gen2. Restore the appropriate
ARB_fragment_shader check to the clear path which was lost in:

 commit 94f22fbe787214580a1a13a774114d2650c166cb
 Author: Tapani Pälli <tapani.palli@intel.com>
 Date:   Wed Aug 8 20:46:45 2012 +0300

    intel: use _mesa_meta_Clear with OpenGL ES 1.1 v2

v2: Fix spelling in commit message

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
i915: Emit 3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLE

According to gen2 BSpec the pipeline must be flushed at least up to the
windower before changing the scissor rect enable field. Emitting the
3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLE is sufficient
to do that.

gen3 BSpec no longer has that piece of text, but let's make the same
change there too for symmetry. The spec does still say that the scissor
rectangle must be defined before enabling it, so the new order does seem
more in line with the spec.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
i965: Always enable VF statistics

Every other unit in the geometry pipeline automatically enables
statistics gathering. This part of the pipe has been controlled by the
DEBUG_STATS variable, but this is asymmetric. This dates back to the
original implementation, and I am not sure if there is a reason for it.

I need access to these stats to implement ARB_pipeline_statistics_query.

Eric wrote it, and Ken touched it last. Do you have any opposition?

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86145
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>