usb: tegra: add USB device controller driver for tegra chip

Add High-speed USB device controller driver for tegra chips.
This can work in OTG device mode with tegra OTG driver.
Driver currently supports only UMTIP PHY.

Bug 887361

Change-Id: I63774a44e3bb607c93007b170ba8b811f96e43f8
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/97918
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
arm: tegra: thermal: removed TEGRA_THERMAL_SYSFS

Removed the CONFIG_TEGRA_THERMAL_SYSFS option. Any
throttling activities must go through the Linux
thermal sysfs framework now via CONFIG_THERMAL.

Change-Id: Ibe680d82d3225994e6bebcfe75a0f058e567e35c
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/103182
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: dc: Change the definitions in display feature table.

Change-Id: I13f0f7502aea7f43b2ddff12e9664c22a1d9bd21
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/103210
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
power: smb349: support for self-powered devices

Some self-powered devices doesn't strictly follow USB spec that
has 5V Vbus to upstream cannot work with mux on the data lines.

The MAX4983 mux routes the data lines to SMB349 rather than the
Tegra chip when PGOOD polarity is low-active and DCIN is 5V.

Change PGOOD not to invert polarity for the devices that has 5V to
upstream.

Bug 981761

Change-Id: Ic67ec66ce8936d9a9d5d2df7bca2ff7f9c65b147
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/103526
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
ARM: tegra: cardhu: add A07 memory table

Bug 970890

Change-Id: If0ebb1ad76dfe3267bc0acd3feae70a701c1dfdb
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/103237
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
ARM: Tegra: P1852: changed nor timing regs  and freq

Nor frequency and timing registers changed as per
values provided by syseng

Bug 978870

Change-Id: I18313c7df6265ddd4140d264ac2751ed8f1982df
Reviewed-on: http://git-master/r/103355
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
ARM: tegra: decouple mode from flags

When doing LP2 on last standing CPU, we currently pass
"mode | flag" to a few functions as argument, with the
assumption that "mode" will be confined to lower 22 bits
in PMC_CTRL register and "flags" will occupy higher 10
bits. If "flags" grows downward or "mode" grows upward,
without this explicit knowledge, LP2 will break on the
last standing CPU. Therefore we need to decouple them.

Currently only "flags" part is being used when passed to
other subroutines, so use "flags" only.

Change-Id: I299c998145d81c17760bda8a0b56311fed553958
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/100358
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
arm: tegra: governor:  change governor using cpufreq interface

Older code sets "conservative" governor in early-suspend
using sysfs entries.This implementation changes governor
in early-suspend using cpufreq interfaces.

bug 871958

Change-Id: I721afb6184982a063dc5f330da31f8fb88481cfd
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/100849
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Revert "ARM: vfp: Prevent process migration"

This reverts commit 68667feb8eae225f1293a7044c989ab0bba8dbd1.

Change-Id: I59023f2d83392465f7a989693b67cef96d565ed9
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/102314
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
ARM: vfp: ensure preemption is disabled when enabling VFP access

The vfp_enable function enables access to the VFP co-processor register
space (cp10 and cp11) on the current CPU and must be called with
preemption disabled. Unfortunately, the vfp_init late initcall does not
disable preemption and can lead to an oops during boot if thread
migration occurs at the wrong time and we end up attempting to access
the FPSID on a CPU with VFP access disabled.

This patch fixes the initcall to call vfp_enable from a non-preemptible
context on each CPU and adds a BUG_ON(preemptible) to ensure that any
similar problems are easily spotted in the future.

originally from
http://git.kernel.org/?p=linux/kernel/git/will/linux.git;a=commit;h=468c963e0210bf8108b17cf75066f25f39cabb56

Change-Id: I26fff8abe4c18bd3291613f70d0228aa2313811a
Reported-by: Hyungwoo Yang <hwoo.yang@gmail.com>
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Reviewed-on: http://git-master/r/102315
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
ARM: tegra: define/enable ARCH_HAS_SUSPEND_PAGETABLE

For Tegra, the CPU suspend code path installs its own 1:1 pagetable
setup once at init time. This pagetable is used by all CPUs doing
suspend/resume.

We want to use the common ARM code for CPU suspend/resume, but don't
want the MMU reenable code to patch the current pagetable as it's
shared (and could cause problems if the pagetable loads/stores were
were interleaved).

The installed pagetable already covers the cpu_resume_turn_mmu_on
VA, so we're able to just use the existing pagetable. This sets up
the CONFIG option to skip this part of the MMU reenable.

Bug 929856

Change-Id: Ibbac258122df6def7f7a2d511778a6f11d474938
Signed-off-by: Chris Johnson <cwj@nvidia.com>
Reviewed-on: http://git-master/r/92350
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Ahung Cheng <ahcheng@nvidia.com>
Tested-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-on: http://git-master/r/103205
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
arm: tegra: apbdmaio: Add dma_sync* calls

Add dma_sync* calls to make memory coherent between
CPU and Device.

Bug 983988

Change-Id: I40c514e01130762a12833c3ab7e0613f984870c6
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/103336
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit
video: tegra: dc: Enable GCOV for dc/ext code

Change-Id: Ie6d425f06911008d77c2ed87dc7b40611755ee6a
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/103396
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
ARM: tegra: clock: Account for memory BW efficiency

Account for memory efficiency when processing requests from Tegra3
EMC shared bandwidth users. Do not round requests from these users
until they are aggregated.

The respective debugfs node: /d/tegra_emc/efficiency (in %).

Bug 952739

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 86929087f68c4366d6179101eb9a6a6473a4f084)

Change-Id: I4acdd89f44de1401ce5dad8fc4936932df014458
Reviewed-on: http://git-master/r/103499
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit
arm: tegra: Added support for TDM mode params

Added TDM mode params to be passed from platform to the machine driver

Bug 948478

Change-Id: I909db0ceebde002fcebcf7635cebe98c6a74142d
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/103594
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
video: tegra: dc: remove bandwidth efficiency

Remove the efficiency factor in the bandwidth calculation.
Clock API will take care off setting the right clock based factoring the
efficiency.

Change-Id: I2b549197778b5afaf1aab3cc87a84debb08172e8
Reviewed-on: http://git-master/r/91659
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/103682
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
media: video: tegra: fix nvc power management

NVC focuser code was not up to date with the latest changes
related to power management in upper layers. This change is to fix it.

Bug 968003

Change-Id: I362fa062039eaa06c4f67644eac7ee2db0bf7d6b
Signed-off-by: Anton Kondratenko <akondratenko@nvidia.com>
Reviewed-on: http://git-master/r/103188
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
mmc: returning correct mmc test case number

mmc_test currently shows test case number as 0 for all test cases.
Correcting this to depict the correct test case number.

Bug 976137.

Change-Id: Ifa7bdd08d537ef20a3303594938a771e823d4e3b
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/103368
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Tested-by: Shridhar Rasal <srasal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
video: tegra: nvmap: Export nvmap_duplicate_handle_id

Export nvmap_duplicate_handle_id() for usage by other drivers. It is
already being used in nvavp and tegradc, and nvhost needs it to be
able to move the relocation code to inside nvhost.

Bug 965206

Change-Id: I3f818d1faa967886e834aa457a99dfdb61bc6b85
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/103587
Reviewed-by: Automatic_Commit_Validation_User