nv50: make sure to mark first scissor dirty after blit

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
nvc0: implement multiple viewports/scissors, enable ARB_viewport_array

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
[imirkin: mark things dirty on ctx switch, 3d blit]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
docs: update GL3.txt, relnotes: mark GL_ARB_viewport_array as done for nvc0

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50/ir: Remove NV50_SEMANTIC_VIEWPORTINDEX

Use TGSI_SEMANTIC_VIEWPORT_INDEX for the last consumer.

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
glsl: type check between switch init-expression and case

Patch adds a type check between switch init-expression and case label
and performs a implicit signed->unsigned type conversion when possible.

v2: add GLSL spec reference, do implicit conversion if possible (Matt)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79724
Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/fs: Add SHADER_OPCODE_LOAD_PAYLOAD.

Will be used to simplify the handling of large virtual GRFs in SSA form.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965/fs: Lower LOAD_PAYLOAD and clean up.

Clean up with with register_coalesce()/dead_code_eliminate().
i965/fs: Use LOAD_PAYLOAD in emit_texture_gen7().
i965/fs: Apply cube map array fixup and restore the payload.

So that we don't have partial writes to a large VGRF. Will be cleaned up
by register coalescing.
i965/fs: Only consider real sources when comparing instructions.
i965/fs: Emit load_payload instead of multiple MOVs for large VGRFs.
i965/fs: Support register coalescing on LOAD_PAYLOAD operands.
i965/fs: Perform CSE on load_payload instructions if it's not a copy.

Since CSE creates instructions, if we let CSE generate things register
coalescing can't remove, bad things will happen. Only let CSE combine
non-copy load_payloads.

E.g., allow CSE to handle this

   load_payload vgrf4+0, vgrf5, vgrf6

but not this

   load_payload vgrf4+0, vgrf5+0, vgrf5+1
i965/fs: Copy propagate from load_payload.

But only into non-load_payload instructions. Otherwise we would prevent
register coalescing from combining identical payloads.
i965/fs: Perform CSE on texture operations.

Helps Unigine Tropics and some (old) gstreamer shaders in shader-db.

instructions in affected programs:     792 -> 744 (-6.06%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/fs: Optimize SEL with the same sources into a MOV.

instructions in affected programs:     474 -> 462 (-2.53%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Revert "i965: Add 'wait' instruction support"

This reverts commit 20be3ff57670529a410b30a1008a71e768d08428.

No evidence of ever being used.
glsl: Remove 'struct' from ir_variable declaration.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
swrast: Remove unused solve_plane_recip().

Unused since commit 9e8a961d.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
egl: Remove unused variable dri_driver_path.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>