msm_fb: display: Enable pre-multiplied alpha for MDP303

For images which are pre-multiplied with alpha, driver
support is now added to blend them properly

Change-Id: I1c07496f9d85c50f1df9eb8d70362ff23dbd90f8
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
msm_fb: display: Add BLT support to dsi command mode panel

At run time, mdp BLT (writeback) mode is enabled and disabled
base on performance level to avoid mdp underrun. Move BLT
enabled/disabled logic to pan display so that enabled/disable
is done per commit instead of per queue. Since all panels
are shared same logic, dsi video mode and lcdc panle BLT logic
have been changed accordingly.

Change-Id: Iee4854b1bb6cc6f249dce0c2ccb39d5b07abe858
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay.c
msm_fb: display: clean pipe free or unlock calls

A few places have unnecessary mutex unlock calls, and iommu pipe free
depends on pipe parameters so move it before pipe is zeroed.

Change-Id: I67158380ec2d0f1727bebfaf9e6a4a0652d40f30
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm: Added DFAB clock definitions for msm8x60.

Added DFAB clock definitions for qseecom on msm8x60 target.
Currently this definitions are missing.

Change-Id: If8febc6217fc3c968d4f5534c6fbde3d79488525
CRs-fixed: 351830
Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>
msm_fb: display: add dmap waiting before turn off timing generator

Wait for dmap done to turn off TG to avoid underruns before base
pipe setup and after constant splash during boot time.

Change-Id: I64bc3935d996af1d2d54db4c11319301ea454ced
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
 msm_fb: display: retrieve correct base layer pipe

Base layer pipe is cloned and cached at satge array.
Retrive the real base layer pipe before used it.

Change-Id: I6fc606559684156348a57b500083ed4089fc71b5
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm: display: remove the predefined mdp clk rate tables

Mdp clk rate will be calculated during run time based on pipe
requirements, so the tables in board files are not necessary. Only the
max rate which is target specific is passed to display driver.

Change-Id: Ib42d378e5bb4b6876719c2cebefbd9dc9a4cef15
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
lge: d1l_kr: remove the predefined mdp clk rate tables
msm_fb: display: mdp clk and bw based on vsync

rebased to vsync patch

Change-Id: I2a11866e2dbe26109bf0eefa50fe778286ca5d0d
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay.c
Remove the wrong file included with the previous commit
lge: display: attempt to fix clock errors that possibly caused HW resets

attempt to fix dsi1_esc_clk set failed error
also use this chance to update mipi drivers to ones from lge's jb release