Add ARM ERET and HVC virtualisation extension instructions.

Patch by Matthew Wahab.

Change-Id: Iad75f078fbaa4ecc7d7a4820ad9b3930679cbbbb

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222989 91177308-0d34-0410-b5e6-96231b3b80d8
Add Thumb HVC and ERET virtualisation extension instructions.

Patch by Matthew Wahab.

Change-Id: I131f71c1150d5fa797066a18e09d526c19bf9016

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222990 91177308-0d34-0410-b5e6-96231b3b80d8
[asan] Change dynamic alloca instrumentation to only consider allocas that are dominating all exits from function.

Reviewed in http://reviews.llvm.org/D6412


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222991 91177308-0d34-0410-b5e6-96231b3b80d8
Add post-decode checking of HVC instruction.

Add checkDecodedInstruction for post-decode checking of instructions, to catch
the corner cases like HVC that don't fit into the general pattern. Needed to
check for an invalid condition field in instruction encoding despite HVC not
taking a predicate.

Patch by Matthew Wahab.

Change-Id: I48e28de981d7a9e43569594da3c45fb478b4f795

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222992 91177308-0d34-0410-b5e6-96231b3b80d8
Removed extra whitespace. (Testing commit access). NFC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222994 91177308-0d34-0410-b5e6-96231b3b80d8
[PowerPC] Fix unwind info with dynamic stack realignment

Summary:
PowerPC DWARF unwind info defined CFA as SP + offset even in a function
where the stack had been dynamically realigned. This clearly doesn't
work because the offset from SP to CFA is not a constant. Fix it by
defining CFA as BP instead.

This was causing the AddressSanitizer null_deref test to fail 50% of
the time, depending on whether SP happened to be 32-byte aligned on
entry to a particular function or not.

Reviewers: willschm, uweigand, hfinkel

Reviewed By: hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6410

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222996 91177308-0d34-0410-b5e6-96231b3b80d8
[msan] Add compile-time checks for missing origins.

This change makes MemorySanitizer instrumentation a bit more strict
about instructions that have no origin id assigned to them.

This would have caught the bug that was fixed in r222918.

No functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222997 91177308-0d34-0410-b5e6-96231b3b80d8
The andi16, addiusp and jraddiusp micromips instructions were missing dedicated decoder methods in MipsDisassembler.cpp to properly decode immediate operands. These methods are added together with corresponding tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223006 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Various instruction format bit test cleanups

- Fix missing SALU format bits
- Remove unused isSALUInstr
- Add isVALU
- Switch isDS to use a bit like the others
- Move SIInstrInfo::is* functions to header
- Reorder so they are approximately sorted by type (SALU, VALU, memory)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223038 91177308-0d34-0410-b5e6-96231b3b80d8
Partial revert of r222986.

The explicit set of destination types is not fully redundant when lazy loading
since the TypeFinder will not find types used only in function bodies.

This keeps the logic to drop the name of mapped types since it still helps
with avoiding further renaming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223043 91177308-0d34-0410-b5e6-96231b3b80d8
SelectionDAG switch lowering: Replace unreachable default with most popular case.

This can significantly reduce the size of the switch, allowing for more
efficient lowering.

I also worked with the idea of exploiting unreachable defaults by
omitting the range check for jump tables, but always ended up with a
non-neglible binary size increase. It might be worth looking into some more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223049 91177308-0d34-0410-b5e6-96231b3b80d8
SimplifyCFG: don't remove unreachable default switch destinations

An unreachable default destination can be exploited by other optimizations, and
SDag lowering is now prepared to handle them efficiently.

For example, branches to the unreachable destination will be optimized away,
such as in the case of range checks for switch lookup tables.

On 64-bit Linux, this reduces the size of a clang bootstrap by 80 kB (and
Chromium by 30 kB).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223050 91177308-0d34-0410-b5e6-96231b3b80d8
SimplifyCFG: Omit range checks for switch lookup tables when default is unreachable

They would get optimized away later, but we might as well not emit them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223051 91177308-0d34-0410-b5e6-96231b3b80d8
Revert r223049, r223050 and r223051 while investigating test failures.

I didn't foresee affecting the Clang test suite :/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223054 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: lower tail calls correctly when using GHC calling convention.

Patch by Ben Gamari.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223055 91177308-0d34-0410-b5e6-96231b3b80d8
Drop SrcStructTypesSet. It is redundant.

At the only point in the code it is used, we haven't added any of the src types
to DstStructTypesSet yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223057 91177308-0d34-0410-b5e6-96231b3b80d8
[MachineVerifier] Accept a MBB with a single landing pad successor.

The MachineVerifier used to check that there was always exactly one
unconditional branch to a non-landingpad (normal) successor.
If that normal successor to an invoke BB is unreachable, it seems
reasonable to only have one successor, the landing pad.
On targets other than AArch64 (and on AArch64 with a different testcase),
the branch folder turns the branch to the landing pad into a fallthrough.
The MachineVerifier, which relies on AnalyzeBranch, is unable to check
the condition, and doesn't complain. However, it does in this specific
testcase, where the branch to the landing pad remained.
Make the MachineVerifier accept it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223059 91177308-0d34-0410-b5e6-96231b3b80d8
Use C++ typed enums instead of 'unsigned char' for MCInst Kind.  NFC.

This makes it much easier to see the value of operands in the debugger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223060 91177308-0d34-0410-b5e6-96231b3b80d8
Use a range loop. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223066 91177308-0d34-0410-b5e6-96231b3b80d8
Use a continue to reduce indentation and clang-format. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223067 91177308-0d34-0410-b5e6-96231b3b80d8