APPLIED: ASoC: rt5640: add an of_match table

Add a device tree match table. This serves to make the driver's support
of device tree more explicit. Perhaps the fallback for DT matching to
using the i2c_device_id table will go away one day, since it fails in
face of devices from different vendors with the same name.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ASoC: alc5632: fix uninit var in alc5632_probe()

alc5632_probe() returns ret, yet it is not initialized or set anywhere.
This ends up causing the function to appear to fail, and audio not to
work on the Toshiba AC100, with my compiler at least.

This function used to set ret in all cases, but recent cleanup removed
that.

Cc: Xiubo Li <Li.Xiubo@freescale.com>
Fixes: 5d6be5aa6bec ("ASoC: codec: Simplify ASoC probe code.")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ASoC: alc5632: add an of_match table

Add a device tree match table. This serves to make the driver's support
of device tree more explicit. Perhaps the fallback for DT matching to
using the i2c_device_id table will go away one day, since it fails in
face of devices from different vendors with the same name.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ASoC: tlv320aic23: add an of_match table

Add a device tree match table. This serves to make the driver's support
of device tree more explicit. Perhaps the fallback for DT matching to
using the i2c_device_id table will go away one day, since it fails in
face of devices from different vendors with the same name.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ASoC: max98090: add an of_match table

Add a device tree match table. This serves to make the driver's support
of device tree more explicit. Perhaps the fallback for DT matching to
using the i2c_device_id table will go away one day, since it fails in
face of devices from different vendors with the same name.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
pinctrl: tegra: remove redundant data table fields

Any SoC which supports the einput, odrain, lock, ioreset, or rcv_sel
options has the relevant HW register fields in the same register as the
mux function selection. Similarly, the drvtype option is always in the
drive register, if it is supported at all. Hence, we don't need to have
struct *_reg fields in the pin group table to define which register and
bank to use for those options. Delete this to save space in the driver's
data tables.

However, many of those options are not supported on all SoCs, or not
supported on some pingroups. We need a way to detect when they are
supported. Previously, this was indicated by setting the struct *_reg
field to -1. With the struct *_reg fields removed, we use the struct
*_bit fields for this purpose instead. The struct *_bit fields need to
be expanded from 5 to 6 bits in order to store a value outside the valid
HW bit range of 0..31.

Even without removing the struct *_reg fields, we still need to add code
to validate the struct *_bit fields, since some struct *_bit fields were
already being set to -1, without an option-specific struct *_reg field to
"guard" them. In other words, before this change, the pinmux driver might
allow some unsupported options to be written to HW.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
pinctrl: tegra: remove fsafe from data tables

The fsafe value in the pingroup data tables is only used to implement
tegra_pinctrl_disable(). The only reason this function is called is when
dynamically switching between pinmux states, i.e. when disabling the old
state before programming the new state. It's simpler to have the new
target state define the expected value of each pin (and all current DTs
do that). This also gives more flexibility, since it allows individual
boards explicit control over the "inactive" mux function for each pin,
rather than requiring it to be an SoC-specific value. Assuming this, we
can get rid of the fsafe value from the driver completely, thus saving
some more space in the driver tables.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
pinctrl: tegra: reduce size of data table fields

The range of npins and function ID values is small enough to fit into a
u8. Use this type rather than unsigned to shrink the pinmux data tables.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
pinctrl: tegra: print better error messages

When an attempt is made to configure an unsupported option on a pin,
print the DT property name of that option, so it's easier to debug
what the problem is.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: rebuild tegra_defconfig on next-20140319

Signed-off-by: Stephen Warren <swarren@nvidia.com>
LOCAL HACK: tegra_defconfig changes

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: bluetooth testing hacks for Cardhu

Signed-off-by: Stephen Warren <swarren@nvidia.com>
HACK venice2 not to use an audio CODEC
HACK venice2 to work on tegrasim again
Revert "HACK venice2 to work on tegrasim again"

This reverts commit ca881fab84612917149afb3ace3601f7ceeaa8ef.
Revert "HACK venice2 not to use an audio CODEC"

This reverts commit dcb81b8af8fe21353d92915e0621acde703ca7b7.
ARM: tegra: add Jetson TK1 device tree

Jetson TK1 is an NVIDIA Tegra124 development board, containing Tegra124,
2GB RAM, eMMC, SD card, SPI flash, serial port, PCIe Ethernet, HDMI,
audio, mini PCIe, JTAG, SATA, and an expansion IO connector containing
GPIOs, I2C, SPI, CSI, eDP, etc.

The following features work with this device tree: UART, SD card, eMMC,
SPI flash, USB (full-size jack, and mini-PCIe), audio, AS3722 RTC, system
power-off, suspend/resume (LP1) with wake via RTC alarm.

The following features should work with this device tree, but are not
validated: Expansion I2C, expansion SPI, expansion GPIO, gpio-key for the
power button.

The following features are not yet implemented in this device tree: Most
voltage regulators, expansion UART, HDMI, eDP, PCIe (Ethernet, and mini-
PCIe connector), CSI, SATA.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: enable AT24C EEPROM driver

This is used for the board ID EEPROM on Jetson TK1, as well as likely
a whole slew of other NVIDIA reference boards; we simply haven't added
enabled the EEPROM in the DT files until now.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: flesh out Jetson TK1 regulators a bit

FIXME: finish this

Signed-off-by: Stephen Warren <swarren@nvidia.com>