Added overclock feature

This branch adds the overclock feature. If activated and the hse clock source is used the PLL is configured to use a higher multiplier and the board runs at 80 or 84 MHz (depending on the hse frequency).

The readEEPROM function is split in the actual eeprom reading and activation of the loaded configuration. The config is read before the systemInit function is called. Now the status of the overclock feature is accessible during the systemInit. The remaining configuration is activated after the systemInit. 

I did not extensively test the changes yet. If activated the higher frequency is displayed in the status screen and I did not notice any negative side effects. I just have a acro naze rev 5 so I cannot test if the mag/baro/older revisions still work.

The looptime value is too low if this feature is activated. It would be possible to scale it internally to the actual frequency.

Did I miss anything else?