Halfband decimator added sclr line to clear the state.
Core now points to main_128Dsp_32Msps.v top level module, which is now considered the factory standard top-level module for the ASR-2300 FPGA logic.
Revert "Core now points to main_128Dsp_32Msps.v top level module, which is now considered the factory standard top-level module for the ASR-2300 FPGA logic."

This reverts commit 22c198dc73cafa4c68d2b62e71f492394a0aec40.
Merge branch 'ltxdev' of https://github.com/myriadrf/A2300 into ltxdev

Conflicts:
	hdl/wca/hal/halfband_decim.gise
Revert "Halfband decimator added sclr line to clear the state."

This reverts commit ce1df8031faffb47915bdd1b5b75c57f6d43a952.