regulator: ti-abb: Add support for interleaved LDO registers

Certain platforms such as DRA7 have quirky memory maps such as:
PRM_ABBLDO_DSPEVE_CTRL	0x4ae07e20
PRM_ABBLDO_IVA_CTRL	0x4ae07e24
other-registers
PRM_ABBLDO_DSPEVE_SETUP	0x4ae07e30
PRM_ABBLDO_IVA_SETUP	0x4ae07e34

These need the address range allocation to be either not reserved OR
unique allocation per register instance or use something like syscon
based solution.

By going with unique allocation per register, we are able to now have
a single compatible driver for all instances on all platforms which
use the IP block.

So, introduce a new "ti,abb-v3" compatible to allow for definitions
where explicit register definitions are provided, while maintaining
backward compatibility of older predefined register offsets provided
by "ti-abb-v1" and "ti-abb-v2".

As part of this change, we rename a few variables to indicate the
appropriate meaning.

Upstream-commit:6127daa85094e20b42d306dde800e0d745847990
Upstream-Source:v3.15-rc8
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
regulator: ti-abb: Remove redundant error message

kzalloc prints its own OOM message upon failure.

Upstream-commit:8bad62cca362a7bc5c752adc0f87ff96f136146d
Upstream-Source:v3.15-rc8
[nm@ti.com: Modified for dropping 5c24d355dd9af29abb25fb3891122af5e80a551d pickup from 3.15]
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
ARM: dts: DRA7: Add device nodes for ABB

Add ABB device nodes for DRA7 family of devices. Data is based on
DRA7 Technical Reference Manual revision I (Sept 2013)

Upstream-commit:a1b8ee105888f7041e99944d4deed0b0c5af5eca
Upstream-Source:v3.15-rc8
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
PM / Voltagedomain: Add generic clk notifier handler for regulator based dynamic voltage scaling

This patch provides helper functions for drivers that wish to scale
voltage through the clock rate-change notifiers. The approach taken
is that the user-driver(cpufreq/devfreq) do not care about the
details of the OPP table, nor does it care about handling the voltage
regulator directly.

By using the clk notifier flags, we are able to sequence the operations
in the right order. The current logic is heavily influenced by
implementation done in cpufreq-cpu0.

Based on an original series by Mike Turquette <mturquette@linaro.org>

Signed-off-by: Nishanth Menon <nm@ti.com>
cpufreq: cpufreq-cpu0: use clk rate-change notifiers

Removes directly handling of OPP tables and voltage regulators by
calling of_clk_cpufreq_notifier_handler, introduced by commit "clk:
cpufreq helper for voltage scaling".

In the future this can help consolidate code found across similar
CPUfreq drivers.

Based on an original series by Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
devicetree: bindings: add documentation for voltagedomain

Add documentation for voltage domain binding format. Specific
voltage domains will have bindings corresponding to them.

Signed-off-by: Nishanth Menon <nm@ti.com>
PM / Voltagedomain: introduce voltage domain driver support

Many SoCs have basic concepts of voltage rails supplying a specific
SoC device. These voltage rails may be as simple as a single regulator
or complex to be three or more regulators that are transitioned in
tandem with respect to clock changes. In some cases, they may tend
to use custom frameworks to do the actual voltage transition OR use
hardware modules that takes hints about the required configuration and
does optimized voltage transitions.

The current regulator model provides the basic building blocks for the
transitions, however SoC drivers specific to each of these devices, be
it cpufreq/devfreq have to replicate the logic for functionality.

To simply the logic, we can hence introduce a layer that takes care
of the mundane transition logic, registration mechanisms to provide
the "user drivers" such as cpufreq/devfreq a generic interface, whose
details are abstracted by the device tree description for the SoC on
which the driver operates on.

This allows us opportunity to make generic cpufreq / devfreq drivers
which may deal with a single clock, however the actual voltage change
mechanism can be customized specific to SoC without impact to the
generic driver.

Signed-off-by: Nishanth Menon <nm@ti.com>
devicetree: bindings: voltagedomain: add bindings for OMAP compatible SoCs

Add documentation for device tree description for basic voltage domain
for Texas Instruments OMAP compatible SoC family of processors which
controls both bias and supply voltage planes.

Signed-off-by: Nishanth Menon <nm@ti.com>
PM / Voltagedomain: introduce basic voltage domain support for OMAP

OMAP platforms have multiple voltage domains, but each with consistent
behavior of controlling the VDD (supply) and VBB(ABB/Bias voltage).

These need to be sequenced in a specific order for functionality.
Further optimization such as AVS(Adaptive Voltage Scaling), optimized
voltages from efuse(Class0) can also be introduced based on this basic
framework.

This now allows reuse by voltage domain devices which may share the same
voltage domain by allowing the regulator framework to maintain per
consumer usage information.

Signed-off-by: Nishanth Menon <nm@ti.com>
PM / Voltagedomain: OMAP: introduce support for optimized vdd

SoCs such as OMAP5, DRA74x and DRA72x use optimized VDD voltages
for operation. This optimized voltage is stored in efuse register
which is unique per sample. So, for these samples, use optimized
voltages from efuse. Introduce compatibility flag which provides this
information.

Signed-off-by: Nishanth Menon <nm@ti.com>
PM / Voltagedomain: Add support for optimized voltage domains without ABB

Certain voltage domains such as core domain on OMAP5+ do not have
additional BodyBias voltage plane. However, these voltage domains do
have efuse encoded information for optimzed voltages.

So, define a new compatibility match for this.

Signed-off-by: Nishanth Menon <nm@ti.com>
ARM: dts: dra7: add voltage domains

Add the transitioning voltage domain definitions.

Signed-off-by: Nishanth Menon <nm@ti.com>
ARM: dts: dra7-evm: Add vdd regulators for voltage domains

Add voltage domain specific VDD regulators.

With this change, we also switch cpu0-supply over to using voltage
domain based transition.

Signed-off-by: Nishanth Menon <nm@ti.com>
ARM: dts: OMAP5: Update CPU OPP table as per final production Manual

As per the Final production Data Manual for OMAP5432,
SWPS050F(APRIL 2014)

There are only two OPPs - 1GHz and 1.5GHz. the older OPP_LOW has been
completely descoped. The Nominal voltages are still correct though.
However, expectation for final production configuration is operation
with Adaptive Body Bias (ABB) and Adaptive Voltage Scaling Class 0
operation.

There are no IDcode or version change information encoded to
programmatically detect this and software is supposed to NOT use
OPP_LOW(500MHz) anymore for all devices (legacy and production
samples).

Upstream-posted:https://patchwork.kernel.org/patch/4309441/
Signed-off-by: Nishanth Menon <nm@ti.com>
ARM: dts: OMAP5: Add device nodes for ABB

Add ABB device nodes for OMAP5 family of devices. Data is based on
final production OMAP543x Technical Reference Manual revision Z (April 2014).
Final production Data Manual for OMAP5432 SWPS050F(APRIL 2014).

[nm@ti.com: co-developer and updates to latest documentation, rebased to
v3.14]
Upstream-posted:https://patchwork.kernel.org/patch/4309451/
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrii.Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: dts: OMAP5: Add voltage domains

Add the transitioning voltage domain definitions.

Signed-off-by: Nishanth Menon <nm@ti.com>
ARM: dts: omap5uevm: Add vdd regulators for voltage domains

Add voltage domain specific VDD regulators.

With this change, we also switch cpu0-supply over to using voltage
domain based transition.

Signed-off-by: Nishanth Menon <nm@ti.com>
Merge remote-tracking branch 'nmenon/v3.14/never-upstream/power/voltagedomain' into pm-ti-linux-3.14.y-next

Conflicts:
	arch/arm/boot/dts/dra7.dtsi
	drivers/cpufreq/cpufreq-cpu0.c

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Merge remote-tracking branch 'nmenon/v3.14/never-upstream/power/voltagedomain-omap5' into pm-ti-linux-3.14.y-next

Conflicts:
	arch/arm/boot/dts/omap5.dtsi

Signed-off-by: Tero Kristo <t-kristo@ti.com>
regulator: tps65218: Add the missing of_node assignment in probe

[ Upstream commit d2fa87c3af0df7ed10463afc588affdab954fa92 ]

Add the missing of_node assignment in probe.

Fixes: 90e7d5262796 (regulator: tps65218: Add Regulator driver for TPS65218 PMIC)
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: <stable@vger.kernel.org> # v3.15