ASoC: msm: q6: check upper bounds when copy ac3 params

Although AC3 maximum param size is fixed, better check upper bounds
when copy user data. It might cause overflow, possibly cause memory
corruption.

Change-Id: I2f7cec8edd9e013de1433ea06480b963ec307196
Signed-off-by: Fred Oh <fred@codeaurora.org>
msm: ipa: teth_bridge: bug fix in get_aggr_capabilities ioctl

Incorrect input validation may cause a kernel memory disclosure to user
space. This fix adds the correct input validation.

Change-Id: Ia0a3f6bae3c9efc48136bad9974516929e76f4fb
CRs-Fixed: 555453
Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
diag: Fix for diag debugfs buffer overflow

Diag debugfs buffer has potential buffer overflow scenario which can cause
memory corruption. Added safeguard to prevent this.

Crs-fixed: 585147
Change-Id: Ie1f099bb4bb626adff99ae225966aef70c1bc15e
Signed-off-by: Sreelakshmi Gownipalli <sgownipa@codeaurora.org>
defconfig: remove support for /dev/mem and /dev/kmem on perf builds

Keeping /dev/mem and /dev/kmem exposed to userspace allows userspace
to peek/poke to these areas and is a security risk. Remove support for
/dev/mem and /dev/kmem on perf builds.

Change-Id: Icaed922d80e271670fb0571852833d452771376c
CRs-Fixed: 530719
Signed-off-by: Sarang Joshi <spjoshi@codeaurora.org>
msm: msm_bus: Don't divide RPM BW requests

When sending bandwidth requests to slave don't divide the request by
the number of ports as this is done at the RPM driver.

CRs-Fixed: 611965
Change-Id: Ie6870b66d1621677d94e4441136aed89bbdb6595
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
msm: msm_bus: Change priority overrides based on master configuration

When BIMC master enables BKE (in limiter mode), priority override
should be disabled since master is getting limited bandwidth.
However when BKE is disabled, make sure priority overrides are enabled
if master is in fixed mode.
Also enable the bke bit as part of switching QOS modes.

Change-Id: I318b3542f3f5da5685d5641701e0b6c8fc64732c
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Divya Sharma <c_shard@codeaurora.org>
msm: msm_bus: Changes for QOS computation at BIMC

Modify the computation of dynamic QOS parameters for BIMC. The bandwidth
paramter was incorrectly assumed to be in beats/s, it is infact in bytes/s
so there is no need to take bus width into account.
Also change resolution for statically prgrammed grant period to nano second
from micro second since each tick of the QOS clock is in the nano second
range.

Change-Id: Iad9ebc7837b769f8cd9c4215cb102f6916c0845d
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Signed-off-by: Amir Vajid <avajid@codeaurora.org>
Signed-off-by: Divya Sharma <c_shard@codeaurora.org>
msm: msm_bus: Arbitrate IB for dual config masters

Arbitrate the IBs on nodes marked as dual config. This will prevent cases
where the last client's requests is always used to apply dual config rules.

Change-Id: I06f9a16e5f32c1cda7a5d04a72a6e5cf7dc9fae6
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Signed-off-by: Divya Sharma <c_shard@codeaurora.org>
msm: msm_bus: Don't program bw regs in dual config

When in dual configuration mode, don't program the bw registers
since they are already programmed at boot up.

Change-Id: I74d559f997b6374df7b68ffd022aa6d36beb7a9d
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Signed-off-by: Divya Sharma <c_shard@codeaurora.org>
msm: msm_bus: Modify IB aggregation at master

The IB aggregation at master assumed that the sel_clk pointers were set
before trying to access them, but there could be clients that register
but don't do any transaction at all which could lead to data aborts during
the IB aggregation. Change this to directly access the allocated pnode
entry instead of relying on sel_clk pointer.

Change-Id: Iefffdd5ff835496fa54d3de97e416a62735154a2
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Signed-off-by: Divya Sharma <c_shard@codeaurora.org>
ARM: dts: msm: Modify bus vector for RNG client on msm8974

Modify the RNG (Random Number Generator) bus vector to use a different
originating master id, this change helps alleviate some slowdowns in boot
time noticed in targets where CPU is artificially bus throttled below a
threshold frequency.

Change-Id: Idf2a1d128f56e6aafebcbf0184ef2454d385be34
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Signed-off-by: Divya Sharma <c_shard@codeaurora.org>
ARM: dts: Reintroduce dual config for CPU on msm8974

Reintroduce the dual configuration mode for CPU masters on msm8974.
This will enable throttling of CPU in certain low bandwidth usecases
to alleviate timeline issues for other real time masters in the SOC.

Change-Id: Ic32f217ce40ee6ead4edd191811f9ce9f4e7e7ce
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Signed-off-by: Divya Sharma <c_shard@codeaurora.org>
Merge "diag: Fix for diag debugfs buffer overflow"
msm: msm_fb: remove mmio access through mmap

Disable access to mm io and add
appropriate range checks to ensure valid accesses
through framebuffer mmap. This prevents illegal
access into memory.

CRs-Fixed: 474706
Change-Id: If25166f2732433ef967e99c716440030b567aae9
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
Signed-off-by: Shalabh Jain <shalabhj@codeaurora.org>
Merge "ASoC: msm: q6: check upper bounds when copy ac3 params"
Merge "defconfig: remove support for /dev/mem and /dev/kmem on perf builds"
Merge "msm: msm_fb: remove mmio access through mmap"
msm: cpr-regulator: add dummy read to bypass false register value

There is an issue in certain CPR HW, which requires ignoring the
first read of IRQ_STATUS register in ISR.

CRs-Fixed: 570495
Change-Id: Ib1a57a3da3c60ffb5af3669947a4eb09dbb8c255
Signed-off-by: Ke Liu <keliu@codeaurora.org>
msm: cpr-regulator: add debug message in cpr_scale

Add debug message in cpr_scale to show gcnt and quotient when ceiling or
floor is hit.

Change-Id: I6bb6f5160f9f0b3d9140384871b0258b0ecac388
Signed-off-by: Ke Liu <keliu@codeaurora.org>
msm: cpr-regulator: add support for virtual corner based quotient scaling

The current cpr-regulator driver implementation uses the same CPR target
quotient, which is read from a fuse, for all CPU frequencies handled by a
given voltage corner. This results in unnecessary additional power
consumption when operating the CPU at one of the lower frequencies handled
by one voltage corner. Hence change the driver to adjust the CPR quotient
value according to the virtual corner corresponding to the CPU frequency.

CRs-Fixed: 583719
Change-Id: Ia95688b8c6e88d14da1ac9311d73148802105d0a
Signed-off-by: Ke Liu <keliu@codeaurora.org>