MIPS: JZ4770: Fix divider selection for main clocks
[RFC] MIPS: JZ4770: Added basic cpufreq driver

This driver only supports switching between two dividers (1 and 3).
Using different dividers for the CPU clock requires changing the
other main clocks (PCLK, H0CLK, H1CLK, H2CLK, C1CLK) according to
those rules:

- CCLK must be integral multiple of H0CLK, H1CLK, H2CLK
- C1CLK must be CCLK/2 or equal to H1CLK
- H2CLK must be PCLK or PCLK*2
- H0CLK must be H2CLK or H2CLK*2
- H1CLK must be H0CLK or H0CLK*2

For this basic cpufreq driver to work, a modified bootloader is
required. The default dividers of UBIBoot are
1, 6, 6, 6, 6, 2 (CDIV, H0DIV, H1DIV, H2DIV, PDIV, C1DIV)

According to the previous rules, the following dividers should
work: 2, 6, 6, 6, 6, 2
But this is not the case.

Maybe the multiple between CCLK and H0CLK/H1CLK/H2CLK must be
a power of two, because this works: 3, 6, 6, 6, 6, 3

Thus, to get this basic cpufreq driver to work, you need a bootloader
with the following dividers: 1, 6, 6, 6, 6, 3
linkdev: Allow platform data to override device name
MIPS: JZ4770: GCW0: Add specific name for linkdev device