msm: gdsc: Make enable/disable function clock controls symmetric

Currently, resets are asserted and de-asserted in the same order,
which works fine for cores with only one resettable clock domain,
but causes issues on 8x10 (VFE) where multiple clock domains are
resettable and order matters.

For cleanliness, also make the order of setting/clearing the memory
retention signals symmetric, although order there doesn't matter
at all.

Change-Id: I0d5edcd0d9fe121ed63e032915830a9c82ae5da2
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: hsic_sysmon: Support multiple instances

Enhance the driver to support (currently up to 2) multiple sysmon
interface instances. This is done by classifying the supported PIDs
as either the first or second allowable instance. Add PID 9079 and
allow it to be instantiated as the second instance. Also make use
of the new USB_DEVICE_INTERFACE_NUMBER macro.

Change-Id: I6f9fbf37d151dcce1d0bcf5204460ce0732730f1
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Add missing Documentation for dual configuration for bus masters
msm: msm_bus: fix memory leak in msm_bus_fabric_probe

Certain bus driver data structures do not get freed in the error
paths of msm_bus_fabric_probe. Fix the memory leak.

Change-Id: I7fd890612e33ca519fa4d94edde1954b60b8ef06
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
msm: msm_bus: Change priority overrides based on master configuration

When BIMC master enables BKE (in limiter mode), priority override
should be disabled since master is getting limited bandwidth.
However when BKE is disabled, make sure priority overrides are enabled
if master is in fixed mode.
Also enable the bke bit as part of switching QOS modes.

Change-Id: I318b3542f3f5da5685d5641701e0b6c8fc64732c
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
ARM: dts: msm8610: Fix priorities of Krait on 8610

Move CPU to priority 0 as per the latest settings
document.

Change-Id: I68a4b49805c487e7e37693710c411ff12e6eb369
CRs-Fixed: 489500
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
ARM/dt: 8610: Correct MMSS NoC - BIMC gateway node

MMSS NoC-BIMC connection should be treated as a gateway
and not as a master node. Fix this by adding the gateway
flag.

Change-Id: If4cfc4dffd4a4b4ba1b8741a9f4fb92a6493c5d4
CRs-Fixed: 515761
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
msm: 8x10 BKE settings patch

For the display we limit BW to 300MBps when the request is 800MBps
VFE at P3, MDP DMA at P2, MDP PPP at P1

CRs-Fixed: 506183

Change-Id: Ie00ad942d8d78be07ad4e90ff6f4fe6247d2743a
Signed-off-by: Saurabh Saxena <ssaxen@codeaurora.org>
msm: peripheral-loader: Log clk-ready IRQ to help with debugging

This log message denotes the receipt of "clock ready" interrupt
which is received after a subsystem is brought up.
This interrupt is an indication to the kernel that the subsystem
is capable of voting for it's own resources, and that the kernel can
remove it's proxy votes for these resources.

Change-Id: Ib8a89e9e1ec2a547af4bd969ee31c94c42883d57
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
msm: peripheral_loader: Use the new request_firmware_direct API

The request_firmware_direct API is more suited to devices
with memory constraints. Replace the call to request_firmware
with this new API.

Change-Id: I7e23c7b1f0728126b2b285addf81beee4d80a2b0
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: peripheral-loader: Fix double irq enable

Check device tree for the proxy_unvote gpio only if the pil_desc
defines the proxy_unvote op.

This fixes an issue where the proxy_unvote irq was erroneously
enabled twice by two pil_desc, resulting in a kernel warning.

Change-Id: I07b4377c59a2908caea00b184cc0ef6adfd8f1fb
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: peripheral-loader: Print firmware start and end addresses

Make the starting and ending addresses of the pil images more easily
accessible to the average user. The intent is to reduce effort spent
investigating basic image overlap errors.

Change-Id: I4b1cfe1ba7b0090492443bf6fe301821329b5ae3
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Perf: Add cortex A7 perf support

Support perf events for cortex-A7 PMU

Change-Id: Ie44b077d56f9b538e99ae675efaf1829c1b752b7
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>