mdss: Fix Green Lines

* This is a massive revert/cleanup to fix mdss

Signed-off-by: Chet Kener <Cl3Kener@gmail.com>
mdss: Fix leak

Signed-off-by: Chet Kener <Cl3Kener@gmail.com>
Revert "msm: jpeg: Handle ERESTARTSYS properly"

This reverts commit aa72b594b35e7ce00b3a0d139c431afe5451f8e6.
Revert "msm-camera: Avoid adding top up to calulated ab/ib for single stream."

This reverts commit ba5e277912bdff9269c2edc911ac9077f05091d9.
Revert "[media] Revert "[media] v4l2: vb2: one more fix for REQBUFS()""

This reverts commit 0c4381fa9c44e55fcca599b50ac35bafdf5cf3f5.
Revert "msm: camera: Fix crash in ispif release"

This reverts commit c568cc66d4a8c25bd9896e0c405d90792f12b79d.
msm: vidc: Enable venus power management

Besides clock gating, turn venus core power off
if the core stays idle for given amount of time.
Powering off venus core involves telling TZ to
suspend venus core, detach IOMMU, disable GDSC
regulator, unvote DDR/OCMEM buses.

Turn it on again when driver starts processing new
commands before enabling clocks.

Protect clock and power states and operations
with a common lock.

Change-Id: I49654069920ddaae0e2f8792b14cd1bfeb431c34
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
msm: vidc: add sleep of 100us before clock disable

ARM9 execute following sequence when venus is idle
1. Disable ARM9 watchdog
2. Set bit 30 of A_VENUS_CPU_CS_SCIACMDARG0 register
   to indicate venus is idle
3. Write HFI_MSG_SYS_IDLE to message queue
4. Raise interrupt to host
5. ARM9 execute wait for interrupt instruction to go
   into low power state. This will internally drain the
   ARM9 write buffer which can generate bus transaction.
6. ARM9 in idle

Host clock gate venus based on following sequence
1. Host receive HFI_MSG_SYS_IDLE from the msg queue
2. Host check both cmd / msg queue are empty by
   comparing the queue read/write pointers.
3. Host check bit 30 of A_VENUS_CPU_CS_SCIACMDARG0
   register to confirm it indicate idle
4. Host clock gate whole venus

As the host clock gate venus in step 4, ARM9 is still
in step 5&6. The sleep will ensure that step 5 and 6
are completed before host clock gates venus.

CRs-Fixed: 589417
CRs-Fixed: 595251
Change-Id: Idf1f788718adea2dacceca97afa4ba4fe4562ddd
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
msm: vidc: Make HW timeout and power collapse delay configurable

Provide debugfs node for HW response timeout and a sysfs device
attribute for power collapse delay.

Change-Id: I586f10f3e90df5384c8e465fbfe8e7ebec0915eb
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
msm: vidc: Protect remaining clock operations

Clock enable/disable operations are only protected
during interframe clock gating and power collapse.
With this change, clock operations are also protected
during device initialization and removal.

Change-Id: Idcc81b7563349a45affe4abf0a148c4386be3aa0
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
msm: vidc: Add clocks and power counts

Enable power and clock ref counts in debugfs
to easily debug any ref count mismatch.

Change-Id: If06ef139f5a4517cb29a84e86193a6cc2c0f9e64
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
msm: vidc: Synchronise data shared between controls

Some of the V4L2 controls perform similar tasks and have some shared
data between them.  Unexpected sequences of controls can possibly cause
data coherency issues causing the firmware to be programmed incorrectly.
So, when a control is updated with a new value, update related controls
with a similar enum so that they both have similar values.

Also, change the frame rate values to normal FPS rather than Q16 format.

Change-Id: Iebb0ddc33374ab8eb7106b005965c2eede797aea
Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>
msm: vidc: Increase timeout for power collapse

Increase power collase timeout to avoid venus power
collapse before the video video/encoding decoding is
actually started. This is needed to avoid iommu map
failures at the beginning of the playback.

Change-Id: I82457a9b847c6e8e53bd6ffb6a381a64c0d38417
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
msm: vidc: Handle SYS_IDLE interrupt concurrency

It is possible to receive SYS_IDLE message before
Venus core sends the interrupt for that message.
This results in clocks not being disabled at all
and device will continue to drain power.

This change checks when the interrupt is received
if the venus core is still in IDLE state. If it is
then disable the clocks.

Change-Id: If2b8d778054a702eada40ac3588e2ec3a3fbd80a
CRs-fixed: 548745
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
msm: vidc: Fix handling of ocmem_notifier_register() return value

The ocmem driver might return -EPROBE_DEFER (or any other error)
as a ERR_PTR.  These shouldn't be construed as a valid handle.

CRs-fixed: 565882

Change-Id: I57c9739ae766a1b512ce930005c1cb310aa74034
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
msm: vidc: Halt axi bus before clock disable

Before turning off venus clock, host should make sure
that there are no pending AXI transactions. This is achieved
by halting AXI.

CRs-Fixed: 578007

Change-Id: Ib4a71d1097f2f62e910e00c7be5d32e006d4c62b
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
msm: vidc: Mask interrupts from venus after receiving IDLE message

IDLE message from venus indicates that the venus is idle and its
clocks are turned off. These clocks should not be turned on by any
pending or spurious(interrupts without any message) interrupts to save
power.

Change-Id: I622212a7e8c51106fbf69c491d129f219eb6ce54
CRs-fixed: 583989
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
msm: vidc: Fix a race condition in masking interrupts

Fix a race condition when interaction with firmware happens
in following sequence:

1. Firmware writes IDLE message into the message queue.
2. Driver writes a new command into command queue.
3. Firmware reads this command and starts processing it.
4. Driver checks if command queue is empty and finds it empty.
5. Firmware writes the response (of the command sent in 2) in
   message queue. Firmware also writes another IDLE message and
   sets the idle register.
6. Driver check if the IDLE register is set and finds it set.
7. Driver masks the interrupts. Since interrupts are masked,
   driver misses the response written by firmware in 5.

This race condition is fixed by checking if message queue is
empty or not between 6 and 7.

Change-Id: I4aa17cfc5fd9e33f6b41b6c1b12625789ff02283
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>

Conflicts:

	drivers/media/platform/msm/vidc/venus_hfi.c
msm: vidc: Validate session_id in video hardware response

Validate session_id present in video hardware response
packet before processing it. This will avoid system reset
resulting from invalid session_id returned from video hardware.

Change-Id: I37525a3d10b5efe00734c5533931e2700f3c7513
Signed-off-by: Maheshwar Ajja <majja@codeaurora.org>
msm: vidc: Skip session id validation for HFI_EVENT_SYS_ERROR

When SSR is triggered from driver, firmware is responding with session id
as 0X0000dead. Hence, firmware response is being discarded due to such
invalid session id. Skip session id validation for HFI_EVENT_SYS_ERROR
event type.

Change-Id: I750a7332baab4ebeb7702b49ffb744aae9803a36
CRs-Fixed: 539080
Signed-off-by: Srinu Gorle <sgorle@codeaurora.org>