msm: socinfo: Add support for socinfo v9

A new socinfo format version 9 is added with support
for foundry id. Update the socinfo struct to reflect
this change.

CRs-Fixed: 645243
Change-Id: I8cfd961cd29fc8b7173650e22738db81a7069811
Signed-off-by: Kishan Kumar <kishank@codeaurora.org>
ARM: dts: msm: add support for qseecom bus scaling for 8074, 8226 and 8610.

To support qseecom bus scaling, ab & ib values are changed to set four
bandwidth levels: "INACTIVE, LOW, MEDIUM and HIGH" with corresponding
bus bandwidth of {0M, 0M, 150M, 492M}; and the flag of support-bus-scaling
is also set for apq8074, msm8226 and 8610.

Conflicts:
	arch/arm/boot/dts/apq8074-v2.0-1.dtsi
	arch/arm/boot/dts/apq8074-v2.2.dtsi

Change-Id: I15350619143094d280ebc1e3717418285063448d
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
Signed-off-by: Shruthi Krishna <skrish@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
Signed-off-by: Abhishek Ranjan <aranja@codeaurora.org>
qseecom: Unload the app upon receiving qseecom_release.

Upon receiving qseecom_release() app corresponding to the app id
needs to be shutdown.This is applicable to user space clients as well.

Change-Id: Ie659a9409f8470b7ed4a5088e6779b50c5dc1cca
Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
(cherry picked from commit 1e34cdd714219a4cd0acb3d5b3dfe4280c380699)
selinux: Fix Kernel panic due to NULL pointer dereference

Below Kernel panic is observed due to race condition, where
sock_has_perm called in a thread and is trying to access sksec->sid
without checking sksec. Just before that, sk->sk_security was set
to NULL by selinux_sk_free_security through sk_free in other thread.

31704.949269:   <3> IPv4: Attempt to release alive inet socket dd81b200
31704.959049:   <1> Unable to handle kernel NULL pointer dereference at \
                        virtual address 00000000
31704.983562:   <1> pgd = c6b74000
31704.985248:   <1> [00000000] *pgd=00000000
31704.996591:   <0> Internal error: Oops: 5 [#1] PREEMPT SMP ARM
31705.001016:   <6> Modules linked in: adsprpc [last unloaded: wlan]
31705.006659:   <6> CPU: 1    Tainted: G           O  \
                        (3.4.0-g837ab9b-00003-g6bcd9c6 #1)
31705.014042:   <6> PC is at sock_has_perm+0x58/0xd4
31705.018292:   <6> LR is at sock_has_perm+0x58/0xd4
31705.022546:   <6> pc : [<c0341e8c>]    lr : [<c0341e8c>]    \
                                                  psr: 60000013
31705.022549:   <6> sp : dda27f00  ip : 00000000  fp : 5f36fc84
31705.034002:   <6> r10: 00004000  r9 : 0000009d  r8 : e8c2b700
31705.039211:   <6> r7 : dda27f24  r6 : dd81b200  r5 : 00000000  \
                                                  r4 : 00000000
31705.045721:   <6> r3 : 00000000  r2 : dda27ef8  r1 : 00000000  \
                                                  r0 : dda27f54
31705.052232:   <6> Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM \
                        Segment user
31705.059349:   <6> Control: 10c5787d  Table: 10d7406a  DAC: 00000015
.
.
.
.
31705.697816:   <6> [<c0341e8c>] (sock_has_perm+0x58/0xd4) from \
                    [<c033ed10>] (security_socket_getsockopt+0x14/0x1c)
31705.707534:   <6> [<c033ed10>] (security_socket_getsockopt+0x14/0x1c) \
                           from [<c0745c18>] (sys_getsockopt+0x34/0xa8)
31705.717343:   <6> [<c0745c18>] (sys_getsockopt+0x34/0xa8) from \
                    [<c0106140>] (ret_fast_syscall+0x0/0x30)
31705.726193:   <0> Code: e59832e8 e5933058 e5939004 ebfac736 (e5953000)
31705.732635:   <4> ---[ end trace 22889004dafd87bd ]---

Change-Id: I79c3fb525f35ea2494d53788788cd71a38a32d6b
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
soc: qcom: smd: Validate read and write addresses

The address from which data has to be read and the address to which the
SMD data has to be written is calculated based on the head and tail
indices for that SMD FIFO. If the indices are corrupted, then the
calculated pointer may be outside of the FIFO and may even be outside of
the range of SMEM.

Validate the read and write addresses to be with in the limits of
receive and send FIFO limits respectively.

CRs-Fixed: 550527
Change-Id: Ie5578f6aee73ea2b1435fea7c2a0a6dda14bff82
Signed-off-by: Zaheerulla Meer <zmeer@codeaurora.org>
Merge "soc: qcom: smd: Validate read and write addresses"
msm: vidc: rewrite v4l2 cluster construction.

V4L2 framework has limitation of not supporting
same control in multiple clusters. Overcome this
limitation by grouping all controls in to one
super cluster.

Change-Id: I974199e1388a1b33ae5e56edd4b0af712eb9babf
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
msm: camera: Fix long overflow on the pix clk

Using unsigned long to avoid overflow since
pix clk frequencies might cause long overflow.
Fix this by using unsigned long instead of long.

Change-Id: Iaf184de26d8ae689efa297096be9f01db84faded
Signed-off-by: Peter Liu <pingchie@codeaurora.org>
msm: camera: Make ISP and camera kernel not interruptible

Change wait_event_interruptible_timeout to wait_completion_timeout
in camera kernel and change wait_completion_timeout_interruptible
to wait_event_timeout to avoid getting interrupts from kernel.

Change-Id: Ibf17d0f11ed705e68294257a90f7770676e63cbb
Signed-off-by: Yiduo Wang <yiduow@codeaurora.org>
msm: subsystem_restart: Add notification to indicate powerup failure

Currently, if powering on a subsystem during restart fails, a
kernel panic is trigerred immediately.
Instead, send a 'powerup failure' notification to the drivers
that have registered for notifications regarding the subsystem.
The drivers can then do the necessary cleanup/logging before a
kernel panic is triggered.

Change-Id: I252f221ee009436b7075c203b2a3de45e395c1b0
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
msm: ssr: Send notification during a cold boot failure

Currently, when powering on a subsystem during cold boot fails,
the drivers that have registered for notifications about the
subsystem are not intimated.
Send the 'powerup failure' notification to these drivers to give
them an opportunity to do the necessary cleanup/logging at their
end before the subsystem is shutdown.

Change-Id: I09c10d5ead7dc153ed3ce3caf8f1c3442a66eb96
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
wcnss: Log debug registers when receives certain notification

If powering on a subsystem during restart fails, SSR framework will send
a "powerup failure" notification to the subsystem. Add the support that
WCNSS platform driver will register to listen the notifications and if
receives "powerup failure" notification, it will log the debug registers.

Change-Id: I0ae8a5ee96122d71c7a86711044f6b07e400b62c
Signed-off-by: Yue Ma <yuem@codeaurora.org>
wcnss: add API to check if wcnss is undergoing an SSR

Wlan driver should not read registers from wcnss or
try to communicate with the chip when it is undergoing
a subsystem-restart. Added an API with the wcnss platform
driver to check if ssr is in progress, this API will be
used by the wlan driver to protect register access and
other prohibited operations.

Change-Id: Ia0d93e774af126d84dbaabf5c36a2c90fdbd58be
CRs-Fixed: 621974
Signed-off-by: Mihir Shete <smihir@codeaurora.org>
hwmon: qpnp-adc-current: Add temperature compensation

Add temperature compensation parameters for PM8026 2.1.
Compensate the vbatt voltage for temperature variance above
25degC. Add similar compensation for current compensation.

Also update using the revid api's to check for PMIC revision
instead of using peripheral revision registers. Using
revid PMIC api's makes it easy to follow on what PMIC versions
are the temperature compensation being applied to. Depending
on VADC/IADC revision registers alone may not suffice since
there is no correlation between the individual peripheral
revision and the PMIC number. You could have the same
VADC revision on different PMIC's and to avoid such a
scenario use the PMIC revid.

Change-Id: I90adb1130b2e2461f762df774ddcd018e806cf78
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
ARM: dts: msm: Add phandle to read PMIC rev-id

The VADC/IADC peripheral need to read the PMIC type
and revision to apply the corresponding coefficients
for temperature compensation to vbatt and current.
The property is optional since there are few PMIC
VADC/IADC peripherals that don't have temperature
compensation coefficients added and during such
conditions the temprerature compensation is
not applied for those channels.

Change-Id: I5229934bec71b86f923042af943a3e080ceb009b
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
qpnp-pmic: revid: Add PMIC revision ID support

Add Revision ID support for PM8226 v2.2.

Change-Id: Iadb13841bcfbbaa19642d541e5fb3f2a3f5a7544
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
hwmon: qpnp-adc: add PM8110 2.0 temperature compensation info

Add in support for PM8110 2.0 temperature compensation.
Also, fix a few bugs in the ADC compensation algorithm
where 25C was treated as 2.5C.

Change-Id: Iafa3ceca2b5938432116ecc905dd54b2da7c4b0b
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
hwmon: qpnp-adc-current: fix current compensation direction

Currently the current compensation in the IADC driver is using the wrong
polarity. The compensation function is treating the current with the
battery being the source (i.e. discharging is positive and charging is
negative), but the IADC's IBAT readings treat the battery as a sink
(i.e. charging is positive and discharging is negative).

Fix this by reversing the sign of the iadc current readings before
doing compensation.

Change-Id: I1413ce491b1f430b6a78bfc480174321c512e289
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
hwmon: qpnp-adc-current: log the compensation coefficients

The compensation coefficients are used to execute performance
tests. Provide this information in the debug logs of the IADC driver.

Change-Id: I59df9501d8edf652c6cf0999a17cc820115b07cc
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
hwmon: qpnp-adc-current: Add temperature compensation

Add temperature compensation for IADC PM8026v2.2.
It shares the same temperature compensation parameters
as PM8026v2.1. The temperature compensation is required
on top of gain/offset calibration to compensate
for variations due to chip revision, manufacturer and
temperature.

Change-Id: Ic39ba249d8d28c36bf59d650dcc2c2a3889ee55b
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>