ARM: assembler.h: use same WRITE_ALIGN_BYTES on omap4 as on armv6 platforms

Not all armv7 have 64 kbytes of l1 cache, for example the
Cortex-A9, which has 32 kbytes. As all omap4 platforms also
run Cortex-A9, adjust WRITE_ALIGN_BYTES accordingly.

Still needs testing.