Caches: Rename index->tag

The index points to the offset in the cache and tag memory. The tag is
the part left of the index in the address and it is stored in the tag
memory at the addressed index, not the index is stored in the tag.

Some beautification and documentation
Caches: Optimized LRU unit

This is the generic LRU unit. It uses an optimized vector which is of
size (NUMWAYS*(NUMWAYS-1))>>1. The content of the vector is the
reduced set of direct comparisons (x<y) where x is older than y. As
the module forbids x is equally old as y we have a symmetric behaviour
(x<y)=!(y<x).

For four ways the vector is then:

history [5:0] = {(2<3),(1<3),(1<2),(0<3),(0<2),(0<1)}

Further details, the instantiation and the algorithm itself are
documented in the module.
Caches: Support multiple ways

Adds support for more than two ways. The memories are accordingly
replicated, the status vector extended, and some extra multiplexing
added. The caches still use LRU and utilize the optimized LRU unit.