x86: Remove forgotten release of pci_lock

Regression of 8c20eff688: lock is taken/released inside the
data_port_in/out_handlers now.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
tools: config-create: Account for larger sets of CPUs

Reserves as many cpu set words as actually required. Format the
initialization in hex to improve readability with large numbers of CPUs.

Signed-off-by: Henning Schild <henning.schild@siemens.com>
[Jan: fixed trailing whitespace]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
tools: config-create: Return empty dir list when running in generator mode

No point in returning valid results here. The files in this directory
may not be accessible for normal users, and then the collector
generation will fail prematurely.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
tools: config-create: Get rid of record switch in input_open

We no longer invoke input_open if the file is part of a recorded
directory. So this switch became obsolete.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
tools: config-create: Cleanup typos and style in collector template

No functional changes.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
tools: config-create: Differentiate between optional and mandatory files during collect

Bail out if a required file is missing but continue without irritating
warnings if an optional one cannot be found.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
tools: config-create: Simplify optional file handling and generator mode

Stop passing exceptions from input_open to its callers: An optional file
can be returned as empty (derived from /dev/null), same on failures
during collector creation. The typical mode for input_open is 'r', so we
can save passing this explicitly in most cases. Same for optional which
is generally False.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
tools: config-create: Do not bail out on missing ACPI tables

Rather warn and give the user a chance to post-process the config file.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
tools: config-create: Sort listed directories

This will specifically ensure that PCI devices will be added to the
configuration file in a sorted manner which helps with manual
post-processing.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
tools/configs: Describe PCI capabilities in config files

Instead of parsing the PCI config spaces in the hypervisor, offload this
to the configuration generator. It will produce a (logically) linked
list of capabilities per device, their ID, start and length. Each
capability can furthermore be marked as writable by the cell.

Note that identical capability lists shared between multiple devices
will automatically folded into a single one. The user can duplicate and
customize them individually in a manual post-processing step.

Configurations are updated for QEMU, the H87i and the pci-demo cell.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Moderate access to PCI capabilities

Make use of the capability configuration and permit write access only to
explicitly configured capabilities. Read access is harmless as it is
free of side effects.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Prevent getting stuck while trying to clear the APIC

If some interrupt source (typically a level-triggered IOAPIC pin)
continuously sends messages to the APIC we are trying to clear from
pending bits in ISR and IRR, we will get stuck in the hypervisor in an
interrupt storm.

Avoid this by limiting the number of handled interrupts to the number of
vectors we have. When reaching this limit, simply raise TPR to break out
of the loop. It's cleared again on exit from apic_clear, and the code
booting the CPU can handle the then pending interrupt itself. That's
just like real hardware would behave.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Refactor x2apic_handle_read/write

Use the relative APIC registers number internally and prepare the
interface of x2apic_handle_write for returning access errors.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Move ICR access dispatching into x2apic_handle_write

More code sharing, specifically when AMD support will be added.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Filter writes to reserved APIC register bits

Set up a bitmap for all xAPIC/x2APIC register that marks reserved bits
(or complete registers). Check to-be-written values against this bitmap
before executing accesses in hypervisor context.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Filter LVT delivery modes

Do not allow cells to program anything else than Fixed or NMI mode. NMIs
will still be swallowed by the hypervisor NMI interception path, so perf
& Co. remain broken.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Update TODO

Recently added APIC topics are addressed now. Also add new ideas
regarding error handling and cell watchdogs / message timeouts.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
inmates: pci-demo: Clear STATESTS before triggering the MSI

STATESTS may still have pending events which could prevent a MSI
delivery after controller reset. That reset doesn't clear them, so do
this explicitly.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
configs: Adjust MSI capability address of HDA devices

Real hardware locates MSI at 0x60, only current QEMU has this at 0x50
(patch posted).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Fix calculation of MMCONFIG region size

The PCI Firmware Specification says: "For PCI-X and PCI Express
platforms utilizing the enhanced configuration access method, the base
address of the memory mapped configuration space always corresponds to
bus number 0 (regardless of the start bus number decoded by the host
bridge) [...]." So drop the start bus from the size calculation.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>