msm: mdss: Detach mdss iommu on static screen

Detach mdss iommu on static screen and re-attach
on next commit to allow full power collapse of MDSS.
IOMMU driver keeps its vote for bus bandwidth for as
long as the MDP driver is attached to the IOMMU.
When MDP detaches from the IOMMU, IOMMU driver will
remove its vote for bus bandwidth.

Change-Id: I1e5c5c50bc157c3ebfc63e198e4608dad820a288
Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
Signed-off-by: Shruthi Krishna <skrish@codeaurora.org>
(cherry picked from commit e8f9507cd07c2bf1cb121dacab65800f631988d2)
msm: mdss: Implement overlay handoff for continuous splash screen

In order to support a smooth and seemless transition from the splash
screen to the boot animation, MDP needs to handoff all the
hardware ctl, mixers and pipes that were staged by the bootloader.
Implement this functionality by populating the MDP software structure
to reflect the state of the hardware at probe time. This removes the
the need to turn off the MDP timing generator when transitioning to
the boot animation and reduces this delay to just one frame.

Change-Id: I607e7b8af3e477ad960497548e8617ceb9cfbdfd
CRs-Fixed: 546447
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>

Conflicts:
	drivers/video/msm/mdss/mdss_mdp_intf_video.c
	drivers/video/msm/mdss/mdss_mdp_overlay.c
mdss: display: edp continuous splash support

Both edp main link clock and pixel clock are source from PLL.
This patch add edp clock nodes into system clock tree so that
both main link clock and pixel clock are configured properly
to support different panels with different resolution. Edp
related clocks handoff from bootloader are supported.

Change-Id: I6e4096beb9bff0d39f4f850bbc6d2157ac42e524
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>

Conflicts:

	drivers/video/msm/mdss/mdss_mdp.h

Signed-off-by: Manish Kumar <manishku@codeaurora.org>
msm: mdss: error handling in the dsi driver on 8x10

This adds the error handling in the dsi command send and receive
functions.

Change-Id: I69d77a6f1981a286864e7076aee079776ed53a85
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
ARM: kernel: update cpu_suspend code to use cache LoUIS operations

In processors like A15/A7 L2 cache is unified and integrated within the
processor cache hierarchy, so that it is not considered an outer cache
anymore. For processors like A15/A7 flush_cache_all() ends up cleaning
all cache levels up to Level of Coherency (LoC) that includes
the L2 unified cache.

When a single CPU is suspended (CPU idle) a complete L2 clean is not
required, so generic cpu_suspend code must clean the data cache using the
newly introduced cache LoUIS function.

The context and stack pointer (context pointer) are cleaned to main memory
using cache area functions that operate on MVA and guarantee that the data
is written back to main memory (perform cache cleaning up to the Point of
Coherency - PoC) so that the processor can fetch the context when the MMU
is off in the cpu_resume code path.

outer_cache management remains unchanged.

Change-Id: Id5a6d34d55d1b0a5ef112cafc3ad21c0da4b0b84
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
qseecom: Check input buffer from IOCTL

IOCTL messages come with pointers to buffer, check these
buffer pointers prior to accessing it.

Change-Id: Ibd724a35682a6f8e4f6900c8404854a8b55c0c9a
Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
msm: kgsl: When switching pagetable use current context ID

When we switch pagetables then the pagetable switch commands
should be executed on behalf of the currect active context and
not the context to which we are switching. This is because
until the pagetable switch occurs the GPU will be using the
pagetable of the active context.

CRs-fixed: 574989
Change-Id: I9ca65ea399e39a158dc72adc2c7b661f62f18c93
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
msm: kgsl: Account for fixed perfcounter groups

Most performance counter groups have general purpose counters that
can be programmed to any number of countable types.  That said
some groups have counters with fixed countables.  When reserving those
groups the countable is equal to the register - so when you ask for
countable 0 in VBIF_PWR for example it is expected that will always
match to a certain register.  Add a flag member to the perfcounter
group and declare PWR and VBIF_PWR as fixed groups and handle them
accordingly in adreno_perfcounter_get() so that the correct register
is returned.

CRs-fixed: 582739
Change-Id: Ic0dedbad271c7472efce5f79e9055b7b3d224d17
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Re-enable performance counters

Commit b80b6c9daf379b3784e68 accidently disabled all performance
counters which caused the fault tolerance to falsely trigger more
often.  Re-enable the performance counters and remove duplicate
code to enable the VBIF registers (they are enabled by the
a3xx_perfcounter_enable function).

CRs-fixed: 581430
Change-Id: Ic0dedbad277e796e6b2e7bd8e938cb8afe03207b
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
defconfig: Enable msm_sharedmem UIO driver

Enable msm_sharedmem UIO driver on targets which use RemoteFS
(over QMI) and RFSA.

CRs-Fixed: 477427
Change-Id: I63d95aa0fcbbdc17d64fb7749ed50c3890551dce
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
defconfig: Enable config to allow vmalloc savings

Enable the config ENABLE_VMALLOC_SAVINGS to reclaim
vmalloc space in low memory.

CRs-Fixed: 568470
Change-Id: Icd3c985ecc2ee04c09a67eed72ae4f8f5f2e57a3
Signed-off-by: Neeti Desai <neetid@codeaurora.org>

Conflicts:
	arch/arm/configs/msm8610-perf_defconfig
	arch/arm/configs/msm8610_defconfig
defconfig: 8226: Enable ADSP RPC driver

The ADSP RPC driver allows for clients to make remote method
invocations across processor boundary to DSP processor. Enable
this driver for MSM8226.

Change-Id: Id5312df1715b88129479023d189d4ef18afbe3e7
Acked-by: Sathish Ambley <sambley@qti.qualcomm.com>
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>