cpu/allwinner/a10: Add definition for gating GPIO S clock

This bit is not documented in the datasheet, but is used in the
upcoming RAM init code.

Change-Id: I697ec222496236ac7690460ee62313ab8b1a2f0b
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4592
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
cpu/allwinner/a10: Implement udelay using timer 0

Change-Id: I4825f0d57696cd28751c59ae133b7e3315fb78e5
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4595
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
cpu/allwinner/a10: Add function for reading chip revision

Change-Id: Iafbd253235db3914b9382fdb41de2622ef83c6d8
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4596
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
cpu/allwinner/a10: Add definitions for in/output GPIO functions

Change-Id: I2b857d3b4c01e39c62e54f753e400e6049f1dbc9
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4598
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
cpu/allwinner/a10: Add functions for driving GPIO pins

Change-Id: I9473a6e574c3af02d154a7e30245f0dc0b238300
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4599
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
cubieboard: Turn on green LED during bootblock

Change-Id: I807060bde374e4a42abe306cecf838ab157c9515
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4600
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
cubieboard: Keep AHB clock within specs

The CPU was clocked at 384MHz in the bootblock, but the AHB bus has a
maximum rated frequency of 250MHz. Its clock needs to be divided to
keep it within spec. Overclocking the AHB bus hung the CPU when
memory was accessed.

Change-Id: I7cb9cdd1f126b3d5b0446fc68af79b54946bc2d3
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4629
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>