score: Delete SMP_FATAL_SHUTDOWN_EARLY

Sort enum lexicographically.
score: Avoid NULL pointer access

Check that the executing thread is not NULL in _Scheduler_Tick().  It
may be NULL in case the processor has an optional scheduler assigned and
the system was not able to start the processor.
score: _Per_CPU_State_wait_for_non_initial_state()

Replace _Per_CPU_State_wait_for_ready_to_start_multitasking() with
_Per_CPU_State_wait_for_non_initial_state().  Implement this function.
bsps/arm: Simplify Cortex-A9 MPCore start

Add arm_a9mpcore_start_on_secondary_processor().  Rely on error checks
in _SMP_Start_multitasking_on_secondary_processor().
bsps/arm: Cortex-A9 MPCore start

Add arm_a9mpcore_start_enable_smp_in_auxiliary_control().
bsps/arm: Cortex-A9 MPCore start

Enable SCU only on the boot processor.
bsps/arm: Cortex-A9 MPCore start

Invalidate entire branch predictor array.
bsps/arm: Typo
bsps/arm: Add all level data cache invalidation
bsps/arm: Simplify L1 caches support

Delete superfluous/incorrect interrupt disable/enable.
bsps/arm: Add ARM_CP15_TEXT_SECTION

Allow users of this header file to optionally place the inline functions
into a non-standard section.
bsps/arm: Define ARM_CP15_TEXT_SECTION

Define ARM_CP15_TEXT_SECTION to BSP_START_TEXT_SECTION so that the
start code is in the right section.
bsp/altera-cyclone-v: Simplify MMU config table
bsp/altera-cyclone-v: Use NOLOAD for nocache sec
bsp/altera-cyclone-v: Change default baud

Use value for standard U-Boot.
bsp/altera-cyclone-v: Simplify start hooks

Use arm_a9mpcore_start_hook_0().  The L2 cache is now disabled.
bsps/arm: Change L2 cache initialization

Do not touch the L1 caches since they have been initialized by the start
hooks.
bsp/altera-cyclone-v: Move SMP support
bsp/altera-cyclone-v: Enable unified L2 cache
bsps/arm: Fix Cortex-A9 MPCore clock driver

The nanoseconds extension returned wrong values on secondary processors
since some of the global timer registeres are banked.  Use global
variables instead.