Rename MapValue(Metadata*) to MapMetadata()

Instead of reusing the name `MapValue()` when mapping `Metadata`, use
`MapMetadata()`.  The old name doesn't make much sense after the
`Metadata`/`Value` split.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224566 91177308-0d34-0410-b5e6-96231b3b80d8
LTO: Export local context symbols

Export symbols in libLTO.dylib for the local context-related functions
added in r221733 (`LTO_API_VERSION=11`)... and add the missing
definition for `lto_codegen_create_in_local_context()`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224567 91177308-0d34-0410-b5e6-96231b3b80d8
Remove redundant assignment.

Found with the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224570 91177308-0d34-0410-b5e6-96231b3b80d8
[InstCombine] Fix visitSwitchInst to use right operand types for sub cstexpr

The visitSwitchInst generates SUB constant expressions to recompute the
switch condition. When truncating the condition to a smaller type, SUB
expressions should use the previous type (before trunc) for both
operands. This fixes an assertion crash.

Differential Revision: http://reviews.llvm.org/D6644

rdar://problem/19191835

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224574 91177308-0d34-0410-b5e6-96231b3b80d8
Revert "[InstCombine] Fix visitSwitchInst to use right operand types for sub cstexpr"

Reverts commit r224574 to appease buildbots:

The visitSwitchInst generates SUB constant expressions to recompute the
switch condition. When truncating the condition to a smaller type, SUB
expressions should use the previous type (before trunc) for both
operands. This fixes an assertion crash.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224576 91177308-0d34-0410-b5e6-96231b3b80d8
use -0.0 when creating an fneg instruction

Backends recognize (-0.0 - X) as the canonical form for fneg
and produce better code. Eg, ppc64 with 0.0:

   lis r2, ha16(LCPI0_0)
   lfs f0, lo16(LCPI0_0)(r2)
   fsubs f1, f0, f1
   blr

vs. -0.0:

   fneg f1, f1
   blr

Differential Revision: http://reviews.llvm.org/D6723



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224583 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM] Remove dead assignment.

Found by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224586 91177308-0d34-0410-b5e6-96231b3b80d8
[LoopVectorize] Remove redundant assignment.

Found by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224587 91177308-0d34-0410-b5e6-96231b3b80d8
Reapply: [InstCombine] Fix visitSwitchInst to use right operand types for sub cstexpr

The visitSwitchInst generates SUB constant expressions to recompute the
switch condition. When truncating the condition to a smaller type, SUB
expressions should use the previous type (before trunc) for both
operands. Also, fix code to also return the modified switch when only
the truncation is performed.

This fixes an assertion crash.

Differential Revision: http://reviews.llvm.org/D6644

rdar://problem/19191835

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224588 91177308-0d34-0410-b5e6-96231b3b80d8
[BBVectorize] Remove redundant assignment.

Found by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224589 91177308-0d34-0410-b5e6-96231b3b80d8
[BBVectorize] Remove two more redundant assignments.

Found by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224590 91177308-0d34-0410-b5e6-96231b3b80d8
[DebugInfo] Move all DWARF headers to the public include directory.

dsymutil needs access to DWARF specific inforamtion, the small DIContext
wrapper isn't sufficient. Other DWARF consumers might want to use it too
(I'm looking at you lldb).

Differential Revision: http://reviews.llvm.org/D6694

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224594 91177308-0d34-0410-b5e6-96231b3b80d8
[Hexagon] Adding doubleregs for control registers.  Renaming control register class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224598 91177308-0d34-0410-b5e6-96231b3b80d8
[Hexagon] Adding transfers to and from control registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224599 91177308-0d34-0410-b5e6-96231b3b80d8
[Hexagon] Adding xtype shift instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224604 91177308-0d34-0410-b5e6-96231b3b80d8
Add printing the LC_SUB_LIBRARY load command with llvm-objdump’s -private-headers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224607 91177308-0d34-0410-b5e6-96231b3b80d8
[Hexagon] Adding more xtype shift instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224608 91177308-0d34-0410-b5e6-96231b3b80d8
[Hexagon] Adding bit insertion instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224609 91177308-0d34-0410-b5e6-96231b3b80d8
[Hexagon] Adding bit extraction and table indexing instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224610 91177308-0d34-0410-b5e6-96231b3b80d8
merge consecutive stores of extracted vector elements

Add a path to DAGCombiner::MergeConsecutiveStores() 
to combine multiple scalar stores when the store operands
are extracted vector elements. This is a partial fix for
PR21711 ( http://llvm.org/bugs/show_bug.cgi?id=21711 ).

For the new test case, codegen improves from:

   vmovss  %xmm0, (%rdi)
   vextractps      $1, %xmm0, 4(%rdi)
   vextractps      $2, %xmm0, 8(%rdi)
   vextractps      $3, %xmm0, 12(%rdi)
   vextractf128    $1, %ymm0, %xmm0
   vmovss  %xmm0, 16(%rdi)
   vextractps      $1, %xmm0, 20(%rdi)
   vextractps      $2, %xmm0, 24(%rdi)
   vextractps      $3, %xmm0, 28(%rdi)
   vzeroupper
   retq

To:

   vmovups	%ymm0, (%rdi)
   vzeroupper
   retq

Patch reviewed by Nadav Rotem.

Differential Revision: http://reviews.llvm.org/D6698



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224611 91177308-0d34-0410-b5e6-96231b3b80d8