msm: board-msm7627a-wlan: Fix the wlan gpio used for skud-prime

wlan gpio used in skud-prime platform is updated.
This enables wifi on skud-prime.

Signed-off-by: Aparna Mallavarapu <aparnam@codeaurora.org>
(cherry picked from commit 1103c4e2272fce9e30ec4121fa72c82daea9505d)

Change-Id: I1e218cee2ef88e8d81d2985adfc8523783768fae
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: board-msm7627a-wlan: Correct the WLAN GPIO for SKUD-Prime device

Two WLAN GPIOs are being configured for SKUD-Prime device.
Correct the GPIO initialisation for the wifi to work.

Change-Id: Ia8b6f86e17f2ffd2edd9ac4b8de0d73255de604e
Signed-off-by: Aparna Mallavarapu <aparnam@codeaurora.org>
msm: pm-boot: Enable boot remapper for 8x25Q

Configure the boot remapper register for C2 and C3 cores.
When the cores C2/C3 come out of LPM (PC & GDFS), they
start executing from the address configured in the boot
remapper register.

Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
(cherry picked from commit 40b48803d55f39bb715595791247e99a9c056876)

Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
(cherry picked from commit 8f3d695266936d13061a62199ad5547d2347c4fb)

Change-Id: Ia0c79d443b833c8140cd35253248e8f6736a1cfb
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: platsmp-8625: modify pen_release variable to volatile

Since pen_release is a shared variable between cpus. By marking it
as volatile, compiler won't cache that variable into registers and
won't optimize the code which access pen_release variable.

Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
(cherry picked from commit 23f9d1cba9136ad89dc6a26d0d88a4c28bd66153)

Change-Id: Ic816ea0c1767c0373df34cf0934ae415e2e1b29b
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: platsmp-8625: Use real cpu number

Don't use 2nd core as hardcoded CPU number in raise_clear_spi() and
msm8625_release_secondary() APIs. It will not work in the scenarios
where we have more than two cores in the system. Pass the real
CPU number as parameter to make the code generic.

Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
(cherry picked from commit f937d69d89b2dfc69250b28d493562a50ee1d57e)

Change-Id: I96063ab3fd8a2ef74d9685dbe3b229be37fc0804
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: platsmp-8625: Add cold_boot_done as per_cpu variable

cold_boot_done is declared as an ordinary variable, and useful for
single secondary cpu, right now. It will not work in the scenarios
where we have more than two cores in the system. Usage of per-cpu
variable will make the code more generic for multi-core environment.

Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
(cherry picked from commit b4733882c76ff94b65e6c5cbc13c76a2ef03a329)

Change-Id: I1412b08ce02e55621ac55281d539d7bd574b563e
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: platsmp-8625: Refactor code for multicore environment

Generic functions added to make code generic to suit multicore
environment.

Change-Id: I7ae5808682d9454a9bd761fc469d6c75cda4d1e2
Signed-off-by: Taniya Das <tdas@codeaurora.org>
msm: platsmp-8625: Add support for Quad Core 8625Q

Add 8625Q specific code to support quad-core environment.

Change-Id: I6517c1699539cfa9cc8845b87d44ef91322e4115
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
ARM: gic: Refactor code for gic_configure_and_raise

Currently the offset and bit calculation in the function was
hardcoded for IPC1 interrupt. To support other secondary cores
we have to refactor the code to calculate the offset and bits
as per the cpu and interrupt number.

Change-Id: I33de8f185c219fb6a8e9d7f9676e958f27d54a12
Signed-off-by: Taniya Das <tdas@codeaurora.org>
msm: platsmp-8625: refactor code for core_reset_base

The function returns reset_core_base pointer of core1, right now.
The code should be refactored in order to support other cores.

Change-Id: Iac08be058aaf251c8906bb10a82d539162380f51
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
msm: acpuclock: Add 8625q (QPR) acpuclock driver

Add acpuclock driver for MSM8625Q Quad Core chip
to register with the cpufreq driver and provide
the dynamic frequency switching support.

Change-Id: I214ac9781aa0d800d1ef29cf0b89b34fd4ff3ce3
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
Signed-off-by: Utsab Bose <ubose@codeaurora.org>
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/include/mach/clk-provider.h
msm: cpr: Replace mutex with spinlock in atomic context

The CPR suspend is called in an atomic context which leads
to failure if mutex is used before disabling CPR. Replace
with spinlock to fix it.

Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
(cherry picked from commit ea80e643a02dd1f7f3e8941f9ffdb430c5ca8c0e)

Change-Id: I2cabf0d831186e66417abc6869654e6f00425bdc
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: cpr: Use Consecutive Down to avoid any spurious interrupt

CPR would now route a down interrupt to App only when the
recommendation remains same across 2 successive interrupts
thereby reducing any interrupts resulting from a spike
during sampling.

Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
(cherry picked from commit a6bad692980fe23aebe4692357831ef47b07ec1d)

Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
(cherry picked from commit 18f833f986b796edffb74dc42465369da7615e27)

Change-Id: I74afee639a5755a6d785527f006e7a3004e71f99
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: cpr: Limit down step to avoid sudden drops

It has been observed that CPR could recommend more than 4 steps
down followed by equal steps up in certain load situations. To avoid
breaching the system level Vmin which is around 4 steps below, it
is safe to climb down 2 steps at a time and avoid any breach of
minimum voltage requirement. This allows CPR to re-sample and avoid
sudden drop from where it cannot recover.

Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
(cherry picked from commit 358861e1f596adae060105fbbfcaa10666123ae1)

Change-Id: Ibbced5eddf27bf560f6a78bab7340c060de871a6
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: cpr: Clear the interrupts on any state change

Clear the interrupts before enabling CPR sampling and before
saving state during suspend

Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
(cherry picked from commit 0aae7433ae51d054bda422f394af92a753eb41ba)

Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
(cherry picked from commit 15eb77c14814bca14dc6ab2307f4b60888390d66)

Change-Id: I6d9b4a00619c571f0fe91c56c38fa221feecdd59
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: cpr: Add copy from smem for floor_fuse bits

Copy the new floor_fuse bits from smem to app. Update the
padding in the cpr smem structure. As per the new addition
of floor_fuse bits, it is required to add the same in the
structure used by app and thereby copy the value from smem
into the local copy of app. The padding is reduced by 1 byte
since the floor_fuse is of 1 byte. The debug print has been
changed to pr_info for those vital information that are needed
for debug purpose and to assess which type of part the CPR was
running.

Change-Id: Ia1f9dad6519b18360ad7e81c765cc85670ac8708
Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/devices-msm7x27a.c
msm: cpr: Define Vmin based on fused bits in MSM

As per chip charactrization data, it is observed that
minimum voltage requirement is variable and should be
based on the fused bits as per chip characteristics.

Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
(cherry picked from commit 74b62fef69062b32ea67deaafcb473b00140fb54)

Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
(cherry picked from commit 9fabbfbf7db70662b557216bb1ea474d1ee730ef)

Change-Id: I7de00e7620ac0f5c60c9bee5ef7113bf46c14445
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/devices-msm7x27a.c
msm: cpr: Disable CPR based on fused bits in 8x25

A new entry in the shared memory between modem and app
has been added which can decide whether to keep CPR
enabled or not. This is needed to rescue those parts
which may not have the fused bits correctly configured.

Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
(cherry picked from commit ecfc9182890de39e787b7db8e9378c7de6ee52a8)

Change-Id: I50e8b65c8cc7db74cb3b42ef2a91c3a9837a59fb
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: cpr: Turn on messages on fuse value

The fuse values are needed for debug purposes so turn
them on. The default verbosity level kept in the driver
since keeping it at highest, fills up the kernel log
suppresing other useful information.

Change-Id: I93097f5e21cba11e553100b77999d2e9cd42a6c4
Acked-by: Gopi Krishna Nedanuri <gnedanur@qti.qualcomm.com>
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/devices-msm7x27a.c
msm: cpr: remove vp_data data structure

The data members of vp_data structure except step_size are not using
in our current cpr code. So, we can remove vp_data structure and add
step_size as a member of msm_cpr_config.

Change-Id: Ib8a5b87922d8ad93094b6662e066fd1df9bbda6c
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>