target-ppc: ppc64 can be either endian

POWER7, POWER7+ and POWER8 families use the ILE bit of the LPCR
special purpose register to decide the endianness to use when
entering interrupt handlers. When running a linux guest, this
provides a hint on the endianness used by the kernel. From a
qemu point of view, the information is needed for legacy virtio
support and possibly crash dump support as well.

Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
target-ppc: ppc64 can be either endian

POWER7, POWER7+ and POWER8 families use the ILE bit of the LPCR
special purpose register to decide the endianness to use when
entering interrupt handlers. When running a linux guest, this
provides a hint on the endianness used by the kernel. From a
qemu point of view, the information is needed for legacy virtio
support and possibly crash dump support as well.

Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
target-ppc: enable virtio endian ambivalent support

Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
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