power: qpnp-charger: override DCIN_LLIMIT when Parallel charge is disabled

In the parallel charge configuration there is a possibility
of DC_IN being detected as valid and thus allowing current
to flow on the DC_IN path when this is undesirable such
as USB being suspended.

Fix this by keeping the override in place when parallel
path charging is toggled to disable.

CRs-Fixed: 624440
Change-Id: I65d85584ddc800e6d24423707188adedf20681f4
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
msm: mdss: move MDSS revision macros to /linux/msm_mdp.h

Currently kernel driver and user mode libraries keep their own
copies of HW revision numbers. This strategy is prone to errors
and usually frowned upon. Fix this by moving revision information
to sanitized header which is shared by kernel drivers and user mode
libraries.

Change-Id: I59d1256ffd98e07f4ef9ae2b534f04b67abd2119
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
msm: mdss: MDP clock optimization for single layer video playback

MDP core clock bumping is not required for single layer video
playback in 8x26 targets. Hence add revision check to avoid fudge
factor.

Change-Id: I1b0ccb4ef50514f705845b0218fa6ca0d28c1779
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
msm: mdss: Fix mdp clock rate assignment when apply fudge is false

When apply fudge is false, currently mdp clock rate can take
garbage values, hence assign the calculated clock rate without
applying any fudge factors.

Change-Id: I7c9d34024ab94b05160b50560ab136c0c8b7781d
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
USB: ehci-msm2: Add module parameter to activate driver for uicc card

On some platforms, host only port is used for connecting peripherals
like uicc card. Userspace will come to know uicc card insertion and
use sysfs interface to activate driver and binds driver. Hence fail
probe for uicc card till userspace activates this driver through
sysfs.

Userspace has to run following commands to activate driver:
    1. echo Y > /sys/module/ehci_msm2/parameters/uicc_card_present
    2. echo msm_ehci_host > /sys/bus/platform/mdrivers/msm_ehci_host/bind

Also external vbus is not required for uicc card and hence don't fail
probe if no external vbus.

CRs-Fixed: 616098
Change-Id: I821bb2cabf4b5ba46fef71ac48a7df0b7aa74bf6
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
USB: ehci-msm2: Disable runtime pm before remove hcd

when remove callback of ehci-msm2 driver is called during unbind,
it results in crash due to unclocked access while removing hcd.
This happens due to device entered low power mode. Hence fix this
crash by disabling runtime pm before remove_hcd() call during
unbind.

Change-Id: I22840ce02a21ed677ca7c7ebf70970b768e5e05c
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
USB: ehci-msm2: Put data lines into nondriving mode before PHY lpm

On some platforms, 2nd host controller is used to connect UICC card and
it applies pull down resistors on data lines. UICC card is full speed
ICUSB peripheral, which doesn't expect pull down resistor applied on
data lines by host. Hence put datalines in non driving mode during bus
suspend before putting PHY in low power mode so that pull downs will
be removed to save power.

Change-Id: I2df57a082fa47156ab8d8675828a5dfa8a1c35d0
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
ASoC: msm8x10-wcd: Update the codec configuration sequence after SSR

After Sub-System Restart (SSR), codec is not restored back to correct
state prior to SSR which causes the headset detection failure.
Update the codec configuration sequence after SSR to be the correct
state including MBHC configuration.

Change-Id: I9ea7e43a4efe091d0c86282acd04203ad70af432
CRs-fixed: 599247
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
defconfig: 8974: Enable USB CCID class driver

This driver allows user space to communicate with the USB CCID
class devices.

Change-Id: I66ec1b4991bb72f63e1e192fe37cfb23e57037e9
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
ARM: dts: msm: Enable wcnss node in msm8974 LIQUID

Remove AR6004 node and enable wcnss related nodes in
msm8974 LIQUID so that liquid device could use wcnss
wifi solution.

CRs-Fixed: 641765
Change-Id: I4a622c29089268d4f0f148a8dc3c040ceffca8b4
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
msm: cpr-regulator: Improve CPR interrupt handling

disable_irq() is not an efficient call and could cause potential deadlock.
Improve the interrupt handling by removing disable_irq and enable_irq
completely, and instead, checking the state of the interrupt source
(LOOP_EN and BUSY bits) in ISR to bail out immediately if any condition is
not met.

CRs-Fixed: 630182
Change-Id: Ieedadf4f0db4febc41ab85f383af683bdaf34615
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Signed-off-by: Ke Liu <keliu@codeaurora.org>
mmc: core: Fix disabling of cache for Hynix cards

Commit 6932a01cd (mmc: card: quirk: disable cache for Hynix card)
claims to disable cache because of data corruption issues when cache
it is enabled. In reality, the patch allows enabling of cache during
card initialization but disallow flushing of cache during suspend or
file system sync operations. This is more dangerous than without
the commit. Move the fixups for disabling cache to mmc_fixups so as
to enable the quirk during initialization itself. Also, remove obvious
warnings everytime card is initialized during runtime resume.

Change-Id: Ibd120f7b4a4db9b92ce1d9785afd74ae4ea6ee86
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
msm: cpr-regulator: calculate quotient adjustment dynamically

Replace the fixed quotient adjustment algorithm with a new algorithm
that calculates quotient adjustments dynamically.

Calculate the quotient scaling factor according to fused target
quotients and application processor clock frequencies. A different
quotient adjustment value is applied to each voltage corner.

The formula for calculating the quotient adjustment value for each
voltage corner is:
quot_adjust = (freq_turbo_MHZ - freq_corner_MHZ) * scaling / 1000
where the "scaling" is determined using this equation:
scaling = min(max_scaling_factor,
1000 * (QUOT(fused_turbo) - QUOT(fused_norm)) /
(Freq_turbo_MHZ - Freq_normal_MHZ)).

In msm8x26 cpr-regulator device tree node, add a corner to frequency
mapping table, a speedbin + PVS version to max SVS/normal/turbo fuse
corner mapping table, a maximum quotient adjustment scaling factor,and
PVS version eFuse information. With the frequency to corner mapping
table specified in msm8x26 clock-a7 device tree node, this ensures that
1.6G/1.8G msm8226v2 and msm8926 parts receive power saving when running
at turbo frequencies below the maximum possible turbo frequency.

CRs-Fixed: 597721
Change-Id: Ideecccc2f81762bed3668cfdf27d942c00df76ea
Signed-off-by: Wu Fenglin <fenglinw@codeaurora.org>
regulator: mem-acc-regulator: Add a driver to control the MEM ACC

The memory accelerator (MEM ACC) controls the delays applied during
memory access. These delays vary based on the power-mode (corner)
on which the memory is connected. This driver adds a regulator
interface to configure the power-mode of the memory accelerator
based on the APC (application processor) corner.

CRs-fixed: 638439
Change-Id: I830ff000f8a16c4d3de5bdebf48d424354ddb086
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Signed-off-by: Ke Liu <keliu@codeaurora.org>
msm: cpr-regulator: Add support for mem-acc regulator requests

The memory accelerator controls delays while accessing
memories. These delays vary based on the power-mode.
Provide the power-mode (corner) information from CPR
to the memory accelerator driver through the regulator
interface.

CRs-fixed: 638439
Change-Id: I9c13df1695d760aa7b4797f3ba5dc65590cf21e6
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Signed-off-by: Ke Liu <keliu@codeaurora.org>
defconfig: msm8226: Enable the memory accelerator regulator driver

The driver configures the power-mode of the memory accelerator
based on the APC (application processor) corner. The ACC setting
improve the stability and performance of cache accesses.

CRs-fixed: 638439
Change-Id: Ie2ff5a9fd93441c4a4e3e0e52fc4bdac93fa31c7
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Signed-off-by: Ke Liu <keliu@codeaurora.org>
ARM: dts: msm: Add device node for mem-acc-regulator on msm8926-v2

The mem-acc-regulator adds support to select power-mode
for the memory accelerator. Specify the device node properties
for this regulator. Also, pass its handle to the CPR driver.

CRs-fixed: 638439
Change-Id: Ia9789116b2e14a045aa4f9c64e18f2243ef43aa9
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Signed-off-by: Ke Liu <keliu@codeaurora.org>
qseecom: add support to clear key for per file encryption

Make a KMS change to support just clear pipe key without deleting it
from ssd storage. Key id definitions for FDE and PDE are also updated.

Change-Id: I7c4804902a7a734087374c81ff0fd95655d84429
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
iommu: msm: Add base physical address to drvdata structure

Add the physical address value to the iommu drvdata structure. This
address is needed for debugging purposes when we get iommu page
faults and during iommu halt and tlb sync issues.

Change-Id: I2d4f36cdfe8a3da772839cb07cd186820f2e1f52
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
iommu: msm: Do not sleep for 10 ms when TLB sync does not complete

TLB sync might take longer than expected to complete and we wait for 10 ms
to recheck. This is causing jitter in some applications. Instead of waiting
too long to check whether TLB sync has completed we use function
readl_tight_poll_timeout to quickly poll the status without incurring sleep
delay.

We also ensure that if we do eventually time out on the TLB sync or iommu
halt we cause a crash to indicate that something has gone wrong.

CRs-fixed: 608971
Change-Id: I6b3e5155ab7aafa80432f95554d25cf0e2b753f9
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>