cma: Allow option to use strict memblock_reserved memory

Despite all the performance optimizations, some clients are
still unable to use CMA because of the allocation latency.
Rather than make those clients use a separate set of APIs,
extend the CMA code to allow clients to keep the memory out of
the buddy allocator. Since the pages never actually go to the
buddy allocator, allocation and freeing is only based on the bitmap
allocator to find the appropriate region.

Change-Id: Ia31bb1212fd7b19280361128453c8d25369ce592
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
drivers: Add option to reserve default CMA region

CMA provides good utilization of memory but for some use cases, the
allocation time is too costly. Add a Kconfig option to allow the
default region to be permanently set aside for contiguous use cases.

Change-Id: I1eef508d37cf6ae3b7b7a652fc59391b186fc122
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
ARM: proc: Add Krait proc info

Add processor info for the Qualcomm, Inc. Krait family of
processors, to use the generic ARMv7 initialisation
procedure but explicitly enable the IDIV hardware
capability flag.

Change-Id: I080f60189fada2e4f87c79c6b8ef522cdc070759
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
ARM: mm: fix type of the arm_dma_limit global variable

arm_dma_limit stores physical address of maximal address accessible by DMA,
so the phys_addr_t type makes much more sense for it instead of u32. This
patch fixes the following build warning:

arch/arm/mm/init.c:380: warning: comparison of distinct pointer types lacks a cast

Change-Id: Iaba492cb9d35692b0830239b044f9c4e32d7ac16
Reported-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
arm: Add definitions for pte_mkexec/pte_mknexec

Other architectures define pte_mkexec to mark a pte as executable.
Add pte_mkexec for ARM to get the same functionality. Although no
other architectures currently define it, also add pte_mknexec to
explicitly allow a pte to be marked as non executable.

Change-Id: I673b48a1d93bf00682edbb3609a478eb28eb67a1
CRs-Fixed: 498398
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
dma-contiguous: Fix warning when device tree is disabled

Change-Id: I4ed7b4a92e257919d5edae16e22e92cff4317241
ARM: SoC: add per-platform SMP operations

This adds a 'struct smp_operations' to abstract the CPU initialization
and hot plugging functions on SMP systems, which otherwise conflict
in a multiplatform kernel. This also helps shmobile and potentially
others that have more than one method to do these.

To allow the kernel to continue building, the platform hooks are
defined as weak symbols which are overrided by the platform code.
Once all platforms are converted, the "weak" attribute will be
removed and the function made static.

Unlike the original version from Marc, this new version from Arnd
does not use a generalized abstraction for per-soc data structures
but only tries to solve the problem for the SMP operations. This
way, we can collapse the previous four data structures into a
single struct, which is less systematic but also easier to follow
as a causal reader.

Change-Id: I9d022d4e789f8f87f26a237fa2e9e410be070976
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[rameezmustafa@codeaurora.org: backport to kernel 3.4]
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
ARM: 7465/1: Handle >4GB memory sizes in device tree and mem=size@start option

The memory regions which are passed to arm_add_memory() from
device tree blobs via early_init_dt_add_memory_arch() can
have sizes which are larger than will fit in a 32 bit integer,
so switch to using a phys_addr_t to hold them, to avoid
silently dropping the top 32 bits of the size. Similarly, use
phys_addr_t in early_mem() so that mem=size@start command line
options specifying more than 4GB behave sensibly.

Change-Id: I8ea0fa31904903aa78750dadb2e830fa5c6deb1b
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Git-commit: a5d5f7daa744b34477c4a12728bde0a1694a1707
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
ARM: Flush the caches for non panicking CPUs in case of a kernel panic

In case of a kernel panic, only the panicking CPU does an entire
cache flush. This means that certain dirty cache lines in the L1
caches of the other CPUs may never get flushed. This gives us
improper RAM dumps. Add cache flushing for all the online CPUs.
The outer domain is not flushed since it is already being done by
the panicking CPU.

Change-Id: Ibf844ecf6b4dbc3c623789f72a26936aeb4a7306
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
ARM: smp: Save CPU registers before IPI_CPU_STOP processing

When a kernel panic occurs on one CPU, other CPUs are instructed to stop
execution via the IPI_CPU_STOP message. These other CPUs dump their stack,
which may not be good enough to reconstruct their context to perform
post-mortem analysis. Dump each CPU's context
(before it started procesing the IPI) into a globally accessible structure
to allow for easier post-mortem debugging.

Change-Id: I68ac75f73d7ddaebaff9122b23e341bcb00e8fb9
Signed-off-by: Tingting Yang <tingting@codeaurora.org>
ARM: 7486/1: sched_clock: update epoch_cyc on resume

Many clocks that are used to provide sched_clock will reset during
suspend.  If read_sched_clock returns 0 after suspend, sched_clock will
appear to jump forward.  This patch resets cd.epoch_cyc to the current
value of read_sched_clock during resume, which causes sched_clock() just
after suspend to return the same value as sched_clock() just before
suspend.

In addition, during the window where epoch_ns has been updated before
suspend, but epoch_cyc has not been updated after suspend, it is unknown
whether the clock has reset or not, and sched_clock() could return a
bogus value.  Add a suspended flag, and return the pre-suspend epoch_ns
value during this period.

The new behavior is triggered by calling setup_sched_clock_needs_suspend
instead of setup_sched_clock.

Change-Id: I7441ef74dc6802c00eea61f3b8c0a25ac00a724d
Signed-off-by: Colin Cross <ccross@android.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
CRs-Fixed: 497236
Git-commit: 237ec6f2e51d2fc2ff37c7c5f1ccc9264d09c85b
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Srivatsa Vaddagiri <vatsa@codeaurora.org>
ARM: 7565/1: sched: stop sched_clock() during suspend

The scheduler imposes a requirement to sched_clock()
which is to stop the clock during suspend, if we don't
do that any RT thread will be rescheduled in the future
which might cause any sort of problems.

This became an issue on OMAP when we converted omap-i2c.c
to use threaded IRQs, it turned out that depending on how
much time we spent on suspend, the I2C IRQ thread would
end up being rescheduled so far in the future that I2C
transfers would timeout and, because omap_hsmmc depends
on an I2C-connected device to detect if an MMC card is
inserted in the slot, our rootfs would just vanish.

arch/arm/kernel/sched_clock.c already had an optional
implementation (sched_clock_needs_suspend()) which would
handle scheduler's requirement properly, what this patch
does is simply to make that implementation non-optional.

Note that this has the side-effect that printk timings
won't reflect the actual time spent on suspend so other
methods to measure that will have to be used.

This has been tested with beagleboard XM (OMAP3630) and
pandaboard rev A3 (OMAP4430). Suspend to RAM is now working
after this patch.

Thanks to Kevin Hilman for helping out with debugging.

Change-Id: Ie2f9e3b22eb3d1f3806cf8c598f22e2fa1b8651f
Acked-by: Kevin Hilman <khilman@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
CRs-Fixed: 497236
Git-commit: 6a4dae5e138a32b45ca5218cc2b81802f9d378c3
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Srivatsa Vaddagiri <vatsa@codeaurora.org>
ARM: 7643/1: sched: correct update_sched_clock()

If we want load epoch_cyc and epoch_ns atomically,
we should update epoch_cyc_copy first of all.
This notify reader that updating is in progress.

If we update epoch_cyc first like as current implementation,
there is subtle error case.
Look at the below example.

<Initial Condition>
cyc = 9
ns = 900
cyc_copy = 9

== CASE 1 ==
<CPU A = reader>           <CPU B = updater>
                           write cyc = 10
read cyc = 10
read ns = 900
                           write ns = 1000
                           write cyc_copy = 10
read cyc_copy = 10

output = (10, 900)

== CASE 2 ==
<CPU A = reader>           <CPU B = updater>
read cyc = 9
                           write cyc = 10
                           write ns = 1000
read ns = 1000
read cyc_copy = 9
                           write cyc_copy = 10
output = (9, 1000)

If atomic read is ensured, output should be (9, 900) or (10, 1000).
But, output in example case are not.

So, change updating sequence in order to correct this problem.

Change-Id: Ia9196dd50a519f516f70c3138233624b669ef96a
Cc: <stable@vger.kernel.org>
Signed-off-by: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
CRs-Fixed: 497236
Git-commit: 7c4e9ced424be4d36df6a3e3825763e97ee97607
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Srivatsa Vaddagiri <vatsa@codeaurora.org>
ARM: sched_clock: Load cycle count after epoch stabilizes

There is a small race between when the cycle count is read from
the hardware and when the epoch stabilizes. Consider this
scenario:

 CPU0                           CPU1
 ----                           ----
 cyc = read_sched_clock()
 cyc_to_sched_clock()
                                 update_sched_clock()
                                  ...
                                  cd.epoch_cyc = cyc;
  epoch_cyc = cd.epoch_cyc;
  ...
  epoch_ns + cyc_to_ns((cyc - epoch_cyc)

The cyc on cpu0 was read before the epoch changed. But we
calculate the nanoseconds based on the new epoch by subtracting
the new epoch from the old cycle count. Since epoch is most likely
larger than the old cycle count we calculate a large number that
will be converted to nanoseconds and added to epoch_ns, causing
time to jump forward too much.

Fix this problem by reading the hardware after the epoch has
stabilized.

Change-Id: I995133b229b2c2fedd5091406d1dc366d8bfff7b
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Git-commit: 336ae1180df5f69b9e0fb6561bec01c5f64361cf
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[sboyd: reworked for file movement kernel/time -> arm/kernel]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
msm: arm: make nohlt readable

Make the debugfs node 'nohlt' readable.

It is a common use case to want to turn nohlt
on or off, but there is no way to see the current state.
Writing to nohlt increments or decrements its reference
counter, and does not absolutely set the state. By making
it readable, its current state can be checked so that
it can be determined if a write is needed to change the
state.

Change-Id: I08e327808299aef3e125f04bff8b6aad28d020cc
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
arm: Move to upstream udelay via timer implementation

This is a squash of a handful of changes and reverts of the
Qualcomm specific implementation:

  Revert "arm: Implement a timer based __delay() loop"

  This reverts commit 976eafa8b18252876e15f861944acf693b07ce7e.

  Revert "arm: Allow machines to override __delay()"

  This reverts commit bc0ef8ab167272890f1aab62928b04a9aeb87ce9.

  Revert "arm: Translate delay.S into (mostly) C"

  This reverts commit 8d5868d8205d10a0a8e423f53e9cc9bb3e9d1a34.

  ARM: 7451/1: arch timer: implement read_current_timer and get_cycles

  This patch implements read_current_timer using the architected timers
  when they are selected via CONFIG_ARM_ARCH_TIMER. If they are detected
  not to be usable at runtime, we return -ENXIO to the caller.

  Furthermore, if read_current_timer is exported then we can implement
  get_cycles in terms of it for use as both an entropy source and for
  implementing __udelay and friends.

  Tested-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
  Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
  Signed-off-by: Will Deacon <will.deacon@arm.com>
  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

  ARM: 7452/1: delay: allow timer-based delay implementation to be
  selected

  This patch allows a timer-based delay implementation to be selected by
  switching the delay routines over to use get_cycles, which is
  implemented in terms of read_current_timer. This further allows us to
  skip the loop calibration and have a consistent delay function in the
  face of core frequency scaling.

  To avoid the pain of dealing with memory-mapped counters, this
  implementation uses the co-processor interface to the architected timers
  when they are available. The previous loop-based implementation is
  kept around for CPUs without the architected timers and we retain both
  the maximum delay (2ms) and the corresponding conversion factors for
  determining the number of loops required for a given interval. Since the
  indirection of the timer routines will only work when called from C,
  the sa1100 sleep routines are modified to branch to the loop-based delay
  functions directly.

  Tested-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
  Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
  Signed-off-by: Will Deacon <will.deacon@arm.com>
  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

  ARM: delay: set loops_per_jiffy when moving to timer-based loop

  The delay functions may be called by some platforms between switching to
  the timer-based delay loop but before calibration. In this case, the
  initial loops_per_jiffy may not be suitable for the timer (although a
  compromise may be achievable) and delay times may be considered too
  inaccurate.

  This patch updates loops_per_jiffy when switching to the timer-based
  delay loop so that delays are consistent prior to calibration.

  Signed-off-by: Will Deacon <will.deacon@arm.com>

  ARM: delay: add registration mechanism for delay timer sources

  The current timer-based delay loop relies on the architected timer to
  initiate the switch away from the polling-based implementation. This is
  unfortunate for platforms without the architected timers but with a
  suitable delay source (that is, constant frequency, always powered-up
  and ticking as long as the CPUs are online).

  This patch introduces a registration mechanism for the delay timer
  (which provides an unconditional read_current_timer implementation) and
  updates the architected timer code to use the new interface.

  Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
  Signed-off-by: Will Deacon <will.deacon@arm.com>

  ARM: export default read_current_timer

  read_current_timer is used by get_cycles since "ARM: 7538/1: delay:
  add registration mechanism for delay timer sources", and get_cycles
  can be used by device drivers in loadable modules, so it has to
  be exported.

  Without this patch, building imote2_defconfig fails with

  ERROR: "read_current_timer" [crypto/tcrypt.ko] undefined!

  Signed-off-by: Arnd Bergmann <arnd@arndb.de>
  Cc: Stephen Boyd <sboyd@codeaurora.org>
  Cc: Jonathan Austin <jonathan.austin@arm.com>
  Cc: Will Deacon <will.deacon@arm.com>
  Cc: Russell King <rmk+kernel@arm.linux.org.uk>

Change-Id: If1ad095d6852f5966ea995856103e06de6ab2f59
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

Conflicts:
	arch/arm/lib/delay.c

Conflicts:
	arch/arm/mach-msm/timer.c
ARM: architected timers: add support for UP timer

If CONFIG_LOCAL_TIMERS is not defined, let the architected timer
driver register a single clock_event_device that is used as a
global timer.

Change-Id: I28f8380ef88f16739c9f75ca21ecccb8e6241711
Git-commit: 273d16adbccdfe3e4a9d02d286b8f1d76dc9e63f
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
ARM: architected timers: remove percpu_timer_setup

A call to percpu_timer_setup is not needed as its done
by the smp routines. This also leads to a compilation
failure on non-SMP targets.

Change-Id: I261f9c3df659f469de883263bf5f8e2a768a6b1d
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
arm: arch_timer: Allow mmio and cp15 timers to coexist

We need to support both instances of the architected timers at
runtime so that we can register an mmio timer as the broadcast
device. We also need to mark the cp15 timers as FEAT_C3_STOP
because they lost their state in certain low power modes.

Get rid of the pointer indirection and just have multiple
functions for the mmio and cp15 cases. We also assume that the
first frame is always available to us to simplify the logic. This
should be good enough for us for now.

Change-Id: I96f529744f9fa47c04efaf716e475267bae7043c
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
ARM: fiq: Add fiq_set_type to configure lines for FIQ

The lines to be used as FIQ needs to be configured to be
set for the type as EGDE/LEVEL.

Change-Id: Iee746662ecb3e36141aabfa5c5e9813144a836ad
Signed-off-by: Taniya Das <tdas@codeaurora.org>