i965/fs: Don't offset uniform registers in half().

Half gives you the second half of a SIMD16 register, but if the register
is a uniform it would incorrectly give you the next register.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
i965: Add var->location != -1 assertions.

We shouldn't receive variables with invalid locations set - adding these
assertions should help catch problems before they cause crashes later.

Inspired by similar code in st_glsl_to_tgsi.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
freedreno: update generated headers / a4xx fmt rename

Signed-off-by: Rob Clark <robclark@freedesktop.org>
freedreno/a4xx: fd4_util -> fd4_format

Signed-off-by: Rob Clark <robclark@freedesktop.org>
freedreno/a4xx: unify vertex/texture formats into a single table

Similar to the scheme that Ilia put in place for a3xx.

Signed-off-by: Rob Clark <robclark@freedesktop.org>