ralink: fix mt7530 for newer silicon revisions

latest mt7530 silicon seems to have a different phy id.

Signed-off-by: John Crispin <blogic@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@43113 3c298f89-4303-0410-b956-a3cf2f4a3e73
ltq-vdsl-app: use VDSL tone-setup if annex is unset

I had to use a VDSL-only tone-setup to get show-time.
Handle this in uci by checking if annex is unset.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@43114 3c298f89-4303-0410-b956-a3cf2f4a3e73
vgv7519: fix profile, this board have a rt2800-pci board

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@43115 3c298f89-4303-0410-b956-a3cf2f4a3e73
ralink: mt7530 - force wan port up

some bootloaders (linksys e1700) set wonky hw trap values. reset this upon boot to make all ports work.

Signed-off-by: John Crispin <blogic@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@43117 3c298f89-4303-0410-b956-a3cf2f4a3e73
Merge branch 'master' of git://git.openwrt.org/openwrt