The  objective  of  this  course  is  to build knowledge  and  skills  necessary  for  efficient  implementations  of cryptographic primitives on reconfigurable hardware. The implementation platform will be a field programmable gate   array   (FPGA)   containing a general   purpose   processor   and   additional   reconfigurable   fabric   for implementations  of custom hardware accelerators. In the studio format,team projects require  designof selected cryptographic  primitives  followed  bycomparisonand  contrastof  various  implementation  alternatives,  such  assoftware, custom FPGA hardware, and hybrid hardware-software co-design. Project teams are ideally composed of  one  Computer  Engineering  student  and  one  Software  Engineering  or  Computer  Science  student. Computer Engineering students lead the hardware design portions of each project,and Software Engineering and Computer Science students lead the software development portions. Topics may includebinary finite field arithmetic, block ciphers, hash functions, counter mode of operation for block ciphers, public key cryptosystems, hardware/software co-design  methodologies  with  FPGAs,  software  development  and  profiling,  high  level  synthesis,  on-chip  buses, hardware/software interfaces, and custom hardware accelerators.Students are required to conduct a term-long project researching the state-of-the-art technologyrelated tothetopics covered in this course. The deliverable is apresentation andreport summarizing the research.