First commit, testing framework
Looks like things compile now after moving to wonky sbt organization
Fixed source ref for verilog target
Compiles, runtime errors on width elaboration
Compiles and runs, need to deal with multichannel pictures
Works with 3 pixel input, but doesn't have nice way to polymorph byte or pixel input. Determined that having .out targets depend on all *.scala was a bad idea
Added test image output)
Translated Octave from verilog
Added DS, factored out Util
Working on gaussian and FIR
Added fixes from Dreamer meeting, still debugging syntax issues
Finished several of the todos, added UpSampler and DelayDiff. Still working on implementation of DelayDiff before fixing remaining syntax errors
Fixed syntax errors, need to fix runtime errors
Compiles and runs. Fixed makefile dependency to appropriately depend on all scala inputs
Updated makefile, copied over check script from chisel tutorial
Fixed grayscale conversion. Note that im24 rows have to be aligned to 16 bytes
One stage of downsample then upsample seems to work
Did a lot of work on the symmetric FIR, seems to work for row FIR now. Need to figure out why col fir isn't generating any dataflow in gaussian
Added data dir
Merge branch 'master' of https://github.com/ucb-bar/chisel-sift