Rework MMC for card detect (SBK-19) and multiblock read.
Uses DATA[3] as CD, uses code from upstream FSL kernel (imx_3.10.9_1.0.0_alpha)

arch/arm/configs/mx53_efikasb_defconfig:
  - most of the additions were automatically added by make. The only significant difference is we disable CONFIG_MMC_UNSAFE_RESUME, which makes the kernel assume all mmc devices are "always present"

arch/arm/plat-mxc/include/mach/esdhc.h:
  - add card detect / write protect types from upstream FSL kernel to our eSDHC platform data. These are then implemented in arch/arm/mach-mx5/board-mx53_efikasb.c

arch/arm/plat-mxc/include/mach/iomux-mx53.h:
  - Added IOMUX PAD control configuration for SDHC in which DATA3 pin is pulled down, required for using DATA3 for card detect

drivers/mmc/host/sdhci-esdhc-imx.c:
  - Init function handles new card detect types. If the type is ESDHC_CD_CONTROLLER, init will enable DATA3 as card detect by indicating the following through flags:
    * Do not use a GPIO for CD
    * Indicate CD not broken (kernel assumes "always present" if otherwise)
    * Force 1-bit data transfer (DATA3 cannot be used both as CD and as data signalling pin, it seems). Unset 4-bit and 8-bit for good measure.
    * Configure SD1 IOMUX pad with above-added configuration (pull down)
  - Modified register read / write callbacks to handle the following issues:
    * Broken multiblock read (handled by keeping track of field multiblock_status in platform iMX data)
    * Broken card insert / remove interrupts (handled by keeping track of card present status and selectively enabling / disabling the appropriate interrupt)
    * Ensuring D3CD bitfield is set at all times (several operations seem to unset it mysteriously)

drivers/mmc/host/sdhci.c:
  - added (from upstream FSL) a card detect callback for SDHCI's mmc_host allowing better control of card detect logic (useful during development of this fix and for future extensions, but not strictly necessary with this finished solution)