[mips] Move the CHECK lines in mips*-register-names.s to make it more obvious which CHECK matches with which insn

This reveals a small mistake in mips-register-names.s ($sp is tested twice and
$s8 is not tested) which will be fixed in a follow-up commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204792 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] $s8 is an alias for $fp in all ABI's, not just N32/N64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204793 91177308-0d34-0410-b5e6-96231b3b80d8
Follow-up to r204790: don't try to emit line tables if there are no functions with DI in the TU

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204795 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] The register names depend on the ABI being N32/N64 rather than the arch being mips64

Summary: Added test cases for O32 and N32 on MIPS64.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3175

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204796 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Add tests for t0-t3 for N32/N64

These are aliases of t4-t7 and are provided for compatibility with both the
original ABI documentation (using t4-t7) and GNU As (using t0-t3)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204797 91177308-0d34-0410-b5e6-96231b3b80d8
[PowerPC] Lower VSELECT using xxsel when VSX is available

With VSX there is a real vector select instruction, and so we should use it.
Note that VSELECT will still scalarize for v2f64 because the corresponding
SetCC result type (v2i64) is not currently a legal type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204801 91177308-0d34-0410-b5e6-96231b3b80d8
Add @llvm.clear_cache builtin

Implementing the LLVM part of the call to __builtin___clear_cache
which translates into an intrinsic @llvm.clear_cache and is lowered
by each target, either to a call to __clear_cache or nothing at all
incase the caches are unified.

Updating LangRef and adding some tests for the implemented architectures.
Other archs will have to implement the method in case this builtin
has to be compiled for it, since the default behaviour is to bail
unimplemented.

A Clang patch is required for the builtin to be lowered into the
llvm intrinsic. This will be done next.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204802 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Add support for '.option pic2'.

The directive '.option pic2' enables PIC from assembly source.
At the moment none of the macros/directives check the PIC bit
but that's going to be fixed relatively soon. For example, the
expansion of macros like 'la' depend on the relocation model.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204803 91177308-0d34-0410-b5e6-96231b3b80d8
Fix AVX512 Gather and Scatter execution domains.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204804 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] The decision to use MO_GOT_PAGE and MO_GOT_OFST depends on the ABI being N32 or N64 not the arch being MIPS64

Summary: No functional change (in supported use cases)

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3177

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204805 91177308-0d34-0410-b5e6-96231b3b80d8
Change @llvm.clear_cache default to call rt-lib

After some discussion on IRC, emitting a call to the library function seems
like a better default, since it will move from a compiler internal error to
a linker error, that the user can work around until LLVM is fixed.

I'm also adding a note on the responsibility of the user to confirm that
the cache was cleared on platforms where nothing is done.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204806 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Hoist common functionality into a new function.
    
Given that we support multiple directives that enable a particular feature
(e.g. '.set mips16'), it's best to hoist that code into a new function
so that we don't repeat the same pattern w.r.t parsing and handling error cases.

No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204811 91177308-0d34-0410-b5e6-96231b3b80d8
Clarify llvm.clear_cache description.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204812 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: add intrinsics for the v8 ldaex/stlex

We've already got versions without the barriers, so this just adds IR-level
support for generating the new v8 ones.

rdar://problem/16227836

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204813 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64_BE function argument passing for ARM ABI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204814 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Add support to '.set mips64r2'.

The '.set mips64r2' directive enables the feature Mips:FeatureMips64r2
from assembly. Note that it doesn't modify the ELF header as opposed
to the use of -mips64r2 from the command-line. The reason for this
is that we want to be as compatible as possible with existing assemblers
like GAS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204815 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64_BE Elf support for MC-JIT runtime dynamic linker

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204816 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Add support to '.set mips64'.

The '.set mips64' directive enables the feature Mips:FeatureMips64
from assembly. Note that it doesn't modify the ELF header as opposed
to the use of -mips64 from the command-line. The reason for this
is that we want to be as compatible as possible with existing assemblers
like GAS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204817 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Rename function in MipsAsmParser.

parseDirectiveWord is a generic function that parses an expression which
means there's no need for it to have such an specific name. Renaming it to
parseDataDirective so that it can also be used to handle .dword directives[1].

[1]To be added in a follow up commit.

No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204818 91177308-0d34-0410-b5e6-96231b3b80d8
Clarify that select is only non-branching on the IR-level, it often ends
up as jump table or other forms of branches on the machine level.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204819 91177308-0d34-0410-b5e6-96231b3b80d8