aries: add video patches
msm: display: command mode panel release fence

For command mode panel, release fence should be signaled after the buffer is
sent to the panel.  For performance consideration, allow one more commit to be
queued.  Keep the second kick off as short as enough.

Change-Id: I19af075ebf480d3e81b46b1cd2ef21a2893f143e
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Signed-off-by: Iliyan Malchev <malchev@google.com>

Conflicts:
	drivers/video/msm/msm_fb.c
msm: mdp: Update sync pt. behaviour

Add a retire fence and clean up the existing release fence
implementation

Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Change-Id: Iecf7e95d0786ac43aa6a12d70442936600c0249a
gpu: msm: Add new Adreno driver

 * Temporary place for this.
msm: We are using the msm2 gpu driver, not msm

Fix references that are incorrectly pointing at drivers/gpu/msm
instead of msm2.

The incorrect includes cause linaro gcc 4.8 with -O3 to produce
an unbootable kernel on the DLX.

While it doesn't seem to be affecting our normal builds, not
fixing it will likely bite us in the future in some other
mysterious way.

Change-Id: I3c51062ca6a66ddb9782365d2c51c5e485556c1b
gpu: msm2: Sync to upstream

 * Sync with changes done in Google MSM kernel

Change-Id: I38b3d4b41a986dc16097b838afc770e372ddfc7d
gpu: msm2: Sync to upstream

* Sync to android-msm-3.4-flo-lollipop-release

Change-Id: I6595aadd8aca4e2cd724266e42879ca1244eb2fa
msm: kgsl: Add separate GPU shader memory mapping

Add separate kernel memory mapping for GPU shader memory.
Previously, both the register and the shader memory were mapped
as one entity, with the mapping length being equal to combined
size of register memory and shader memory. Now, we separate the
shader memory mapping to help in cases of GPU devices where the
shader and register memory may not be adjacent. This helps to
dump the shader memory in the postmortem snapshot. By having a
separate mapping for shader memory, the snapshot dump routine
simply reads in the shader memory range specified and dumps.

Change-Id: I30e59dffe849fefcfbbaf0e5245cc1024ccedcb1
Signed-off-by: Harsh Vardhan Dwivedi <hdwivedi@codeaurora.org>
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>

msm: Fix mem leak when using per-process pages

When GPU is using per process page tables the code creates
a new page table (domain) for every process. There is also
some associated structures allocated to keep track of each
domain. However, when cleaning up the memory used for a page
table only the domain is freed and not the associated structures.

Add a function to allow a client to properly unregister a domain
which will free all the memory associated with a domain.
Call the unregister function from kgsl driver code.

CRs-fixed: 480801
Change-Id: I9704c12c66a95ce66cea63b619bbdbafa0f1eac8
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Iliyan Malchev <malchev@google.com>

Conflicts:
	arch/arm/mach-msm/iommu_domains.c

msm: kgsl: Remove nap_allowed variable and functionality

Allow NAP on all targets.  The splitting of the clock enable
and disable calls into enable/prepare and disable/unprepare
allows us to safely make this change for all targets.

Change-Id: I03d909b86aef33631a887d159cf0a807a6d0ae75
Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Signed-off-by: Iliyan Malchev <malchev@google.com>

Conflicts:
	arch/arm/mach-msm/iommu_domains.c
	arch/arm/mach-msm/oppo/n1/board-n1-gpu.c
iommu/core: pass a user-provided token to fault handlers

Sometimes a single IOMMU user may have to deal with several
different IOMMU devices (e.g. remoteproc).

When an IOMMU fault happens, such users have to regain their
context in order to deal with the fault.

Users can't use the private fields of neither the iommu_domain nor
the IOMMU device, because those are already used by the IOMMU core
and low level driver (respectively).

This patch just simply allows users to pass a private token (most
notably their own context pointer) to iommu_set_fault_handler(),
and then makes sure it is provided back to the users whenever
an IOMMU fault happens.

The patch also adopts remoteproc to the new fault handling
interface, but the real functionality using this (recovery of
remote processors) will only be added later in a subsequent patch
set.

Change-Id: Ic04659686e72838a0db518e9303dd037191e3879
Cc: Fernando Guzman Lugo <fernando.lugo@ti.com>
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
[ohaugan@codeaurora.org: Resolved compilation and merge issues]
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>

Conflicts:
	drivers/video/msm/mdss/mdss_mdp.c
ARM: Add support for 64 bit register reads/writes

Add macros to read and write to 64 bit registers.

Change-Id: Id45d4086aa148ba96df3987c3341c133f1c56541
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Iliyan Malchev <malchev@google.com>

Conflicts:
	arch/arm/include/asm/io.h
msm: scm: Add scm_call_atomic3

Some drivers need to pass three arguments atomically. Add support
for it.

Change-Id: Id0f962400c5c4f721eef44069fc3db1779248ae3
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>