Update adreno.c
ROW: Hardcode Enable Quantum more larger and read queues more larger too

Signed-off-by: klozz <xxx.reptar.rawrr.xxx@gmail.com>
ARM: add support for kernel mode NEON

In order to safely support the use of NEON instructions in
kernel mode, some precautions need to be taken:
- the userland context that may be present in the registers (even
  if the NEON/VFP is currently disabled) must be stored under the
  correct task (which may not be 'current' in the UP case),
- to avoid having to keep track of additional vfpstates for the
  kernel side, disallow the use of NEON in interrupt context
  and run with preemption disabled,
- after use, re-enable preemption and re-enable the lazy restore
  machinery by disabling the NEON/VFP unit.

This patch adds the functions kernel_neon_begin() and
kernel_neon_end() which take care of the above. It also adds
the Kconfig symbol KERNEL_MODE_NEON to enable it.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Paul Reioux <reioux@gmail.com>
Signed-off-by: Carlos Jesús <xxx.reptar.rawrr.xxx@gmail.com>
Signed-off-by: klozz <xxx.reptar.rawrr.xxx@gmail.com>
ARM: crypto: add NEON accelerated XOR implementation

Add a source file xor-neon.c (which is really just the reference
C implementation passed through the GCC vectorizer) and hook it
up to the XOR framework.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Carlos Jesús <xxx.reptar.rawrr.xxx@gmail.com>
Signed-off-by: klozz <xxx.reptar.rawrr.xxx@gmail.com>
ARM: add support for bit sliced AES using NEON instructions

Bit sliced AES gives around 45% speedup on Cortex-A15 for encryption
and around 25% for decryption. This implementation of the AES algorithm
does not rely on any lookup tables so it is believed to be invulnerable
to cache timing attacks.

This algorithm processes up to 8 blocks in parallel in constant time.
This
means that it is not usable by chaining modes that are strictly
sequential
in nature, such as CBC encryption. CBC decryption, however, can benefit
from
this implementation and runs about 25% faster. The other chaining modes
implemented in this module, XTS and CTR, can execute fully in parallel
in
both directions.

The core code has been adopted from the OpenSSL project (in
collaboration
with the original author, on cc). For ease of maintenance, this version
is
identical to the upstream OpenSSL code, i.e., all modifications that
were
required to make it suitable for inclusion into the kernel have been
made
upstream. The original can be found here:

http://git.openssl.org/gitweb/?p=openssl.git;a=commit;h=6f6a6130

Signed-off-by: xperiafan13 <mundorap2010@gmail.com>

ShockGensMOD Kenrnel