Performing a test to determine what causes the python not communcate with the FPGA.
This chg " addrjpeg_x <= addrjpeg_r + 2;" to " --addrjpeg_x <= addrjpeg_r + 2;",
did not effect the generation of the bit file and the running "python top_level_mod_ram.py".

3 1 1 -3 -3 633 0x00a3 0x009b 0x009b 0x0003 0x2001 0b1 0b1
3 1 0 313 313 633 0x00a3 0x009b 0x009b 0x0003 0x2001 0b1 0b1
3 0 0 75 75 633 0x00a3 0x009b 0x009b 0x0003 0x2001 0b1 0b1
3 0 1 235 235 633 0x00a3 0x009b 0x009b 0x0003 0x2001 0b1 0b1