[ARM] Implement ISB memory barrier intrinsic

Adds support for __builtin_arm_isb. Also corrects DSB and ISB instructions
modelling by adding has-side-effects property.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212276 91177308-0d34-0410-b5e6-96231b3b80d8
IR: cleanup Module::dropReferences

This replaces some old-style loops with range-based for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212278 91177308-0d34-0410-b5e6-96231b3b80d8
fixed typo in comment


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212279 91177308-0d34-0410-b5e6-96231b3b80d8