Revert "Revert "msm: display: reduce display commit prepare waiting time"".

This reverts commit e5f8487f2c7cd90ef83f58fcefe00a5a5317035d.

Change-Id: I3e3858eb211a21a765882fb862f926008d7b926b
Signed-off-by: Anusha Koduru <kanusha@codeaurora.org>
msm: display: only release kickoff when no cleanup pipe

If there is some pipe to clean up, need wait for it be done to
make sure the pipe can be used for the second cycle and recover
mode can be executed.

Change-Id: Ifb3fdb152bc4bbf367b3d272aa0c88b1a0650c19
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Signed-off-by: Neti Ravi Kumar <ravineti@codeaurora.org>
msm: isp: Fix stats mask upon VFE reset.

When streamoff is issued, a HARD reset is done for VFE. This
causes the stats register to be reset to zero. It needs to be
properly initialized with the last used mask upon init.

Change-Id: I5e2fcab0358e63272f40458862f4cf6a7d3bb4bc
Signed-off-by: Abhishek Kondaveeti <akondave@codeaurora.org>
ARM: dts: msm: Add CX regulator Phandle to MDP node

The Phandle might change for different versions of
the msm8974 chip. Add the proper Phandle of CX regulator
to 8974pro version.

Change-Id: I6e8ab19c9765ff225a54a621cd001e8af1c7391d
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
ASoC: msm: qdsp6v2: Add a new waitqueue state for mem map/unmap

All of the commands being sent to the DSP are using cmd_state flag
which can be overwritten when several commands are sent at the same
time. This results in Memory map command timing out. The change will
separate the memory flag from flags for other commands so that they
do not overwrite each other.

CRs-fixed: 673781
Change-Id: I61e059f402feb2c4e1e3dbed1825990456e78471
Signed-off-by: Damir Didjusto <damird@codeaurora.org>
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Merge "ASoC: msm: qdsp6v2: Add a new waitqueue state for mem map/unmap"
Merge "ARM: dts: msm: Add CX regulator Phandle to MDP node"
msm_serial_hs: remove unused code

Remove support for all pre BLSP Hardware such as Data Mover
DMA and GSBI. Clean up all checks for non BLSP hardware and
refactor the code.

CRs-Fixed: 647392
Change-Id: I2df3d036b0ce4a16d5a693059ca4bc51f17eef85
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm_serial_hs: Avoid potential unclocked access by clients

Ensure that the port configuration, data transfer activities
occur when hardware resources are available by voting for them
as the client may call shutdown and clock off asynchronously.

CRs-Fixed: 616127
Change-Id: I7ab171c2176589a54b839cfee8bb33840b55abed
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
msm_serial_hs: wait for clock-off to complete before shutdown

Make sure clock-off request completes before closing the port to
avoid unclocked hardware access.

CRs-Fixed: 648827
Change-Id: I953a06c104830c5515551d5edc4dd9c9a037203f
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm_serial_hs: Handle Tx request while Clock OFF

If client initiates a Tx operation when UART clocks are
Off, the driver should not attempt to send data, as this
would result in interacting with unclocked hardware. Add
support to detect this condition and avoid writing to an
unclocked device.
Add a null check after memory allocation.

CRs-Fixed: 629870
Change-Id: I001516e731e73881a29d768d9fb1bf759f3419b9
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm: mdss: Fix check for highest of overlap and prefill bw calc

This check is supposed to be used to get the max between overlap and
prefill bandwidth value. This value is used when calculating the ib
bandwidth value to request when bus bandwidth is updated. Having a value
that is too low results in mdp underrun.

Change-Id: Ie1302737f004d8e030f8d61c75d4301fe99b1069
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
Merge "msm: mdss: Fix check for highest of overlap and prefill bw calc"
msm_serial_hs: Manage wake unlock delay

Current implementation of wake locks wait for
around 500msec while releasing the wakelock. This
prevents the system suspend for that much time after
the rx operation is done to ensure that all the data
delivered to the client before system suspend.
But some clients may take care of this in their
implementation. In this case uart driver no need to
wait before releasing the wakelock.
Hence, given the control to the client as a dtsi entry
to take decision on waiting before releasing the wakelock.

Change-Id: Ie32a0b76899963e7700ba378906fa4f9b3fa3ba4
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
Merge "msm: isp: Fix stats mask upon VFE reset."
Merge "Revert "Revert "msm: display: reduce display commit prepare waiting time""."
Merge "msm: display: only release kickoff when no cleanup pipe"
Merge "msm_serial_hs: Handle Tx request while Clock OFF"
Merge "msm_serial_hs: remove unused code"
Merge "msm_serial_hs: Avoid potential unclocked access by clients"