cpufreq: Introduce new relation for freq selection

Introduce CPUFREQ_RELATION_C for frequency selection.
It selects the frequency with the minimum euclidean distance
to target. In case of equal distance between 2 frequencies,
it will select the greater freq.

Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr>
ARM: Set CLK_EVT_FEAT_DYNIRQ flag memory mapped timers

Memory mapped timers are used as broadcast timers to wake up a core
across reset. CLK_EVT_FEAT_DYNIRQ ensures only the intended cores are
woken up instead of the default core that they are routed to, thereby
saving power.

Change-Id: I535faa0d1fd328fefe4422a6f362b17c94ab5b8e
Signed-off-by: Karthik Parsha <kparsha@codeaurora.org>
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
ARM: kernel: update cpu_suspend code to use cache LoUIS operations

In processors like A15/A7 L2 cache is unified and integrated within the
processor cache hierarchy, so that it is not considered an outer cache
anymore. For processors like A15/A7 flush_cache_all() ends up cleaning
all cache levels up to Level of Coherency (LoC) that includes
the L2 unified cache.

When a single CPU is suspended (CPU idle) a complete L2 clean is not
required, so generic cpu_suspend code must clean the data cache using the
newly introduced cache LoUIS function.

The context and stack pointer (context pointer) are cleaned to main memory
using cache area functions that operate on MVA and guarantee that the data
is written back to main memory (perform cache cleaning up to the Point of
Coherency - PoC) so that the processor can fetch the context when the MMU
is off in the cpu_resume code path.

outer_cache management remains unchanged.

Change-Id: Id5a6d34d55d1b0a5ef112cafc3ad21c0da4b0b84
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Perf: Make per-process counters cumulative

In order to get overall value for performance counters, remove reset during
context switches. Add mechanism to calculate deltas for output to the trace
buffer.

Change-Id: I03d894a1b3bd400d8c256c3068f917ed001fbfd9
Signed-off-by: Sheetal Sahasrabudhe <sheetals@codeaurora.org>
Perf: Fix PID for tracepoints

Make previous value of PID a per_cpu variable.
This is required to get the correct value for previous_pid.

Change-Id: I63baf8164ae9226189c745339b122d806901789d
Signed-off-by: Sheetal Sahasrabudhe <sheetals@codeaurora.org>
Perf: preserve registers across hotplug

Preserve the registers with userspace bits in them
across hotplug and power collapse. This allows
userspace applications to use the performance counters.

Change-Id: I391563ab770df9aabb5d717b6bc4725750ad0283
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>