Modular Multi-ported SRAM-based Memories

A fully parameterized and generic Verilog implementation of the
suggested modular multi-ported SRAM-based memories, together with
previous approaches are provided as open source hardware. A run-in-batch
flow manager to simulate and synthesize various designs with various
parameters in batch using Altera's ModelSim and Quartus II is also
provided.

Please refer to the full paper for more information:
A. Abdelhadi and G. G.F. Lemieux, "Modular Multi-ported SRAM-based
Memories," ACM/SIGDA Intl Symp. on Field-Programmable. Gate Arrays (FPGA
14), Feb. 2014.
http://www.ece.ubc.ca/~lemieux/publications/abdelhadi-fpga2014.pdf