Added read_verilog -sv options, added support for bit, logic,
allways_ff, always_comb, and always_latch
Added Verilog lexer and parser support for real values
Added real->int convertion in ast genrtlil
Implemented basic real arithmetic
Implemented more real arithmetic
Added handling of real-valued parameters/localparams
Added realexpr.v test case
Added support for math functions
Added %D and %c select commands
Progress in presentation
added first draft of real math testcase generator
Fixed relational operators for const real expressions
progress in realmath test bench
improved (fixed) conversion of real values to bit vectors
improved realmath test bench
Improved AstNode::asReal for large integers
Improved parsing of large integer constants
Improved realmath test bench
Improved AstNode::realAsConst for large numbers
Added tests/realmath to "make test"