intel/minnowmax: Update devicetree

- Align register values.

- Enable both EHCI and XHCI so the choice of port used can be made
at runtime.  When both are enabled in devicetree, XHCI currently gets
disabled by the FSP chipset code.  This can be overridden in mainboard
code or by a Kconfig entry, but there's a question about whether or not
that's desired.

- Enable function 1c.0 so the rest of the functions will be
seen, even though the function is not actually used.  This is a
short-term fix, as the correct solution is to determine whether or not
any of the other functions are enabled, and not to hide function 0 if
they are.  I am working on that, but I want to get this in for now.

Change-Id: I83ae12c2393024b82a55d0b3a5ffa8782e16107e
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7663
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
fsp_baytrail: Allow selection of USB controller by get_option

It was requested to be able to update XHCI vs EHCI via get_option,
so I've added it here for minnow max.  This could get moved to the
chipset_fsp_util.c file later, but I'm adding it here for now.

More checking needs to be added to this:
- Are both controllers enabled in devicetree?  If not, we don't want
to allow the switch.

Change-Id: I4d8d2229cb9fa0cd9068701454b28ffac6d8e767
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7633
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
mainboard/lenovo/g505s/buildOpts.c: Trivial variable rename

Minor fix to avoid confusion, nothing to see here.

Change-Id: I89d56a91d2df049e85cf49c23218620caba84880
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7654
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
vendorcode/amd/agesa/fam15tn: Clean #includes in public headers

Right now, coreboot code using AGESA headers can only build if all the
AGESA path are given to the compiler via the "-I" option. This is sub-
optimal, as it requires us to have every AGESA source directory
specified as a compiler include path. This pollutes our global include
paths.

We restrict the compiler include paths to only allow "AGESA_ROOT/" and
"AGESA_ROOT/Include". We then modify the AGESA headers to specify
non-local include files relative to "AGESA_ROOT/Include".

We use the convention that includes relative to the directory of the
header are included as "path/to/header.h", while includes relative to
AGESA_ROOT are included as <path/to/header.h>.

This change allows building coreboot code based on AGESA with the
limited subset of include paths, but does not allow AGESA itself to
build with this restricted subset.

Change-Id: I31102273c8caa8d6b1d80774bfd35711825bec03
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5424
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
mainboard/*/acpi/superio.asl: Use non-local inclusion syntax

Use non-local inclusion syntax over relative paths for
'drivers/pc80/ps2_controller.asl'.

Change-Id: Ie2bfa893dc268ec5118d2a9addadbc759d85d357
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7664
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
vendorcode/amd/agesa/f15tn: Fix GnbIommuScratch in AGESA compilation

Missing IOMMU support is missing from the libagesa Makefile, it also
lacks a header with type-signature and a few bad typecast issues.

Change-Id: I7f2ad2104de9baaa66dbb6ffeb0f2b4d35fa5c16
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Co-Author: Rudolf Marek <r.marek@assembler.cz>
Reviewed-on: http://review.coreboot.org/7642
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
mainboard/lenovo/g505s: Toggle on IOMMU support

Toggle on in devicetree.cb and build into AGESA by buildOpts.c.
Add ACPI and MPTABLES interrupt routers for IOMMU also.

Change-Id: Ia838f9b70f09ed1180daeb5382edc08c4b74946c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7643
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
ec/compal/ene932/acpi/superio.asl: Provide PNP0F13 AUX ASL

Provide ASL to support the AUX port (a.k.a Mouse) found at
0x60,0x64 irq 12 on this EC.

Change-Id: I6969ae4d492570136a8e14e42509638857e1ed85
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7650
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
mainboard/lenovo/g505s: Build in EC ASL support for KBD/AUX ports

Rather than have Linux report:
 i8042: PNP: No PS/2 controller found. Probing directly.
and go off probing PNP config space, build in EC ASL for the
PS/2 keyboard and mouse.

The ASL explicitly passes these resources to the Linux to avoid
said probe.

ASL Details:
 PS/2 keyboard (PNP0303 at 0x60,0x64 irq 1 )
 PS/2 mouse    (PNP0F13 at 0x60,0x64 irq 12)

Change-Id: I0697fab65915907fbe2b3551182b3a1b0d665ddb
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7651
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
mainboard/lenovo/g505s/Kconfig: Has no SuperIO

Change-Id: I30fdfb70506241838436c3afbf6ddfdbff5cb302
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7668
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
sb/amd/agesa/hudson/: Don't include IMC and XHCI blobs by default

Don't build in non-essential blobs by default. However, if the user
selected to use the blobs repository, then default to including the
blobs.

Change-Id: Ie90f00d7c18d725f24fe1503fadaf098d3cefa4a
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7638
Tested-by: build bot (Jenkins)
soc/qualcomm/ipq806x/Kconfig: Fix indent style

Change-Id: I72c9c1f5811fafaeec9572b05726d5677e2c28b1
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7669
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
northbridge/intel/*/acpi/igd.asl: Trivial indent style fix

Change-Id: I26e92645264c69bbc032b0e7e44d7d31de2dfa4d
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7665
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
vendorcode/amd/agesa: Make Porting.h common between families

Change-Id: Ica17b2452498f30b710533caf610c9f0c1a0452c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7594
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
vendorcode/amd/agesa: Remove unused helper.c file

The contents of these files were guarded by a check for the _MSC_VER
macro, which we don't use.

Change-Id: Ic595c8e6284c54e1449cf21e0cebee8c9ce7c682
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7670
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
NOTFORMERGE: Add tons of ACPI debug info

Change-Id: I2475ba04a5258f9d8af9b987a461ec2d5ab60135
NOTFORMERGE: Hack in usbdebug to SMM

Change-Id: I2fba3f665ff0a18c9edbd726aad7a7123a42a620