Initial drop-in of new interrupt handling framework.

Initial version of refactored interrupt handling framework for
FreeBSD ARM. Currently supports following interrupt controllers:
* lpc_intc in lpc port
* aintc in ti port
* ARM GIC

It's mainly based on 2012 Google Summer of Code project, adapted
for current HEAD and with added SMP (IPI) support. It has been
tested on LPC3250 and Pandaboard (both with and without SMP support).

Introduces hierarchical interrupt controllers in the system, allowing
to easily utilize multiplexers such as GPIOs to serve as interrupt
sources. nexus driver is a top-level interrupt controller, exposing
single interruprt (IRQ) on ARM. The GIC or any other used interrupt
controller setups handler on that interrupt, exposing new IRQs
available for other peripherals. In an example SoC, interrupt hierarchy
may look like that:

nexus0 (1 interrupts)
|
\-- gic0 (160 interrupts, uses irq nexus0:0)
    |
    \-- gpio0 (8 interrupts, uses irq gic0:42)
    |   |
    |   \-- mmcsd0 (uses irqs gpio0:1, gpio0:2)
    |   \-- spi0 (uses irq gpio0:3)
    |   ...
    \-- gpio1 (8 interrupts, uses irq gic0:43)
    \-- ehci0 (uses irq gic0:109)
    ...

That change should not break any existing ports in any way, except
for need to add 'arm/arm/intr.c' to 'files.*' of existing ports,
as it's no longer compiled-in by default.