V4 JIT: tweak generated int32 to double conversion code

If the target is a FP register, and the source is a memory address, do
not load the int32 ourselves, but leave it to the assembler to decide
what to do. On x86(_64) this is generates a single instruction, while on
ARM the assembler will insert a load on its own.

For the case where the target is not a FP register, use the return value
register as base register for the target address. The advantage is that
the address calculation is now independent of the preceding conversion,
so it can fit in a different pipeline without dependencies.

Change-Id: Ib7cefa636274ba8596e4d11ae0170a091a0def3e
Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
V4 RegAlloc: fix use position calculation for phi node arguments.

The correct calculation was already done, but the value was discarded.

Change-Id: I600aeb9414736a3b7924a4a607233ab9bf6c02b6
Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
ItemView: use categorized logging for delegate lifecycle

It becomes configurable at runtime instead of having to uncomment
and recompile.

Change-Id: I2c6f24c89f7e6fe1a9a77b948cdac6f2994680bf
Reviewed-by: Frederik Gladhorn <frederik.gladhorn@digia.com>
Reviewed-by: Robin Burchell <robin.burchell@viroteck.net>
Avoid qmake warnings about wrong includes

QtQuick: WARNING: qquickwindow.h includes qqml.h
when it should include QtQml/qqml.h
QtQuick: WARNING: qsgabstractrenderer.h includes qsgnode.h
when it should include QtQuick/qsgnode.h

Change-Id: I3b9dc20de54ef775c562b2c6b80184a7b3149586
Reviewed-by: Jocelyn Turcotte <jocelyn.turcotte@digia.com>