[analyzer] Handle the M_ZERO and __GFP_ZERO flags in kernel mallocs.

Add M_ZERO awareness to malloc() static analysis in Clang for FreeBSD,
NetBSD, and OpenBSD in a similar fashion to O_CREAT for open(2).
These systems have a three-argument malloc() in the kernel where the
third argument contains flags; the M_ZERO flag will zero-initialize the
allocated buffer.

This should reduce the number of false positives when running static
analysis on BSD kernels.

Additionally, add kmalloc() (Linux kernel malloc()) and treat __GFP_ZERO
like M_ZERO on Linux.

Future work involves a better method of checking for named flags without
hardcoding values.

Patch by Conrad Meyer, with minor modifications by me.
Fix for incorrect address sinking in the presence of potential overflows.

In some cases it is possible for CGP to attempt to reuse a base address from
another basic block. In those cases we have to be sure that all the address
math was either done at the same bit width, or that none of it overflowed
before it was extended.

Patch by Louis Gerbarg <lgg@apple.com>

rdar://16307442
Fix atomic libcall.

This commit fixes a cast instruction assertion failure
due to the incompatible type cast.  This will only happen when
the target requires atomic libcalls.
Add args() iteartor adapter to Function, for range-for loops.

This patch is in similar vein to what done earlier to Module::globals/aliases
etc. It allows to iterate over function arguments like this:

  for (Argument Arg : F.args()) {
    ...
  }
Enable range-for iteration over call/invoke arguments.

Similar to r204835
[MCJIT] Check if there have been errors during RuntimeDyld execution.
[PowerPC] Use VSX vector load/stores for v2[fi]64

These instructions have access to the complete VSX register file. In addition,
they "swap" the order of the elements so that element 0 (the scalar part) comes
first in memory and element 1 follows at a higher address.
[PowerPC] Remove some dead VSX v4f32 store patterns

These patterns are dead (because v4f32 stores are currently promoted to v4i32
and stored using Altivec instructions), and also are likely not correct
(because they'd store the vector elements in the opposite order from that
assumed by the rest of the Altivec code).
R600: Add a testcase for sext_in_reg I missed.

This sext_inreg i32 in i64 case was already handled, but not enabled.
Change the PBQP graph adjacency list structure from std::set to std::vector.

The edge data structure (EdgeEntry) now holds the indices of its entries in the
adjacency lists of the nodes it connects. This trades a little ugliness for
faster insertion/removal, which is now O(1) with a cheap constant factor. All
of this is implementation detail within the PBQP graph, the external API remains
unchanged.

Individual register allocations are likely to change, since the adjacency lists
will now be ordered differently (or rather, will now be unordered). This
shouldn't affect the average quality of allocations however.
[analyzer] Remove the implemented Identical* checkers from the "potential" list.

Edit by Daniel Fahlgren.
[PowerPC] Use v2f64 <-> v2i64 VSX conversion instructions
Remove PBQP-cost dimension sanity assertion in PBQP::Graph::addConstructedEdge.
We're already effectively checking sanity for that in PBQP::Graph::addEdge.
InstrProf: Use references
InstrProf: Use unique_ptr
Fix the ARM VST4 (single 4-element structure from one lane)
size 16 double-spaced registers instruction printing.

This:
	vld4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7]!

was being printed as:

	vld4.16 {d17[1], d18[1], d19[1], d20[1]}, [r7]!

rdar://16435096
[PowerPC] VSX loads and stores support unaligned access

I've not yet updated PPCTTI because I'm not sure what the actual relative cost
is compared to the aligned uses.
[libc++] Teach is_integral, is_[un]signed and make_[un]signed about __[u]int128_t

This commit also adds tests for std::numeric_limits<__[u]int128_t>.

Reviewed in http://llvm-reviews.chandlerc.com/D2917
[PECOFF] Use std::mutex.

Use <mutex> instead of "llvm/Support/Mutex.h".

Also change the type of mutex for the context object to recursive mutex, as
the driver could acquire the lock recursively. E.g. If file A has .drectve
section containing /defaultlib:B, the driver tries to parse file B, and if
file B has .drectve section, the driver acquires the lock again.
Fix problem with r204836

In CallInst, op_end() points at the callee, which we don't want to iterate over
when just iterating over arguments. Now take this into account when returning
a iterator_range from arg_operands. Similar reasoning for InvokeInst.

Also adds a unit test to verify this actually works as expected.