[ADT] Add a generic iterator utility for adapting iterators much like
Boost's iterator_adaptor, and a specific adaptor which iterates over
pointees when wrapped around an iterator over pointers.

This is the result of a long discussion on IRC with Duncan Smith, Dave
Blaikie, Richard Smith, and myself. Essentially, I could use some subset
of the iterator facade facilities often used from Boost, and everyone
seemed interested in having the functionality in a reasonably generic
form. I've tried to strike a balance between the pragmatism and the
established Boost design. The primary differences are:

1) Delegating to the standard iterator interface names rather than
   special names that then make up a second iterator-like API.
2) Using the name 'pointee_iterator' which seems more clear than
   'indirect_iterator'. The whole business of calling the '*p' operation
   'pointer indirection' in the standard is ... quite confusing. And
   'dereference' is no better of a term for moving from a pointer to
   a reference.

Hoping Duncan, and others continue to provide comments on this until
we've got a nice, minimal abstraction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207069 91177308-0d34-0410-b5e6-96231b3b80d8
[ADT] Factor out the facade aspect of the iterator_adaptor_base into its
own CRTP base class for more general purpose use. Add some clarifying
comments for the exact way in which the adaptor uses it. Hopefully this
will help us write increasingly full featured iterators. This is
becoming important as they start to be used heavily inside of ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207072 91177308-0d34-0410-b5e6-96231b3b80d8
Use the shiny new iterator adaptor tool to implement the
value_op_iterator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207078 91177308-0d34-0410-b5e6-96231b3b80d8
Fix for PR18921, "vmov" part.
Added support for bytes replication feature, so it could be GAS compatible.

E.g. instructions below:
"vmov.i32 d0, 0xffffffff"
"vmvn.i32 d0, 0xabababab"
"vmov.i32 d0, 0xabababab"
"vmov.i16 d0, 0xabab"
are incorrect, but we could deal with such cases.

For first one we should emit:
"vmov.i8 d0, 0xff"
For second one ("vmvn"):
"vmov.i8 d0, 0x54"
For last two instructions it should emit:
"vmov.i8 d0, 0xab"

P.S.: In ARMAsmParser.cpp I have also fixed few nearby style issues in old code.
Just for keeping method bodies in harmony with themselves.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207080 91177308-0d34-0410-b5e6-96231b3b80d8
[ADT] Try to appease MSVC by sinking the enable_if from a default
template argument to a default argument to the constructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207082 91177308-0d34-0410-b5e6-96231b3b80d8
[C++] Use 'nullptr'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207083 91177308-0d34-0410-b5e6-96231b3b80d8
[ADT] Attempt to appease another MSVC oddity by moving the injected
class name usage into a context we can put typename on it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207084 91177308-0d34-0410-b5e6-96231b3b80d8
Allow vectorization of few missed llvm intrinsic calls in BBVectorizor by handling them in isVectorizableIntrinsic function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207085 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Switch the SCC's parent iterators to be value iterators rather
than pointer iterators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207086 91177308-0d34-0410-b5e6-96231b3b80d8
X86: Emit test instead of constant shift + compare if the shift result is unused.

This allows us to compile
  return (mask & 0x8 ? a : b);
into
  testb $8, %dil
  cmovnel %edx, %esi
instead of
  andl  $8, %edi
  shrl  $3, %edi
  cmovnel %edx, %esi

which we formed previously because dag combiner canonicalizes setcc of and into shift.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207088 91177308-0d34-0410-b5e6-96231b3b80d8
[CLNUP] Test commit. Remove newline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207089 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] We don't actually need a set in each SCC to track the nodes. We
can use the node -> SCC mapping in the top-level graph to test this on
the rare occasions we need it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207090 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Switch the parent SCC tracking from a SmallSetVector to
a SmallPtrSet. Currently, there is no need for stable iteration in this
dimension, and I now thing there won't need to be going forward.

If this is ever re-introduced in any form, it needs to not be
a SetVector based solution because removal cannot be linear. There will
be many SCCs with large numbers of parents. When encountering these, the
incremental SCC update for intra-SCC edge removal was quadratic due to
linear removal (kind of).

I'm really hoping we can avoid having an ordering property here at all
though...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207091 91177308-0d34-0410-b5e6-96231b3b80d8
[asan] Fix instrumentation of x86 intel syntax inline assembly.

Patch by Yuri Gorshenin.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207092 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Re-order expectations to provide more useful output when debugging
an issue. This way you see that the number of nodes was wrong before
a crash due to accessing too many nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207094 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Rotate logic applied to the top of the DFSStack to instead be
applied prior to pushing a node onto the DFSStack. This is the first
step toward avoiding the stack entirely for leaf nodes. It also
simplifies things a bit and I think is pointing the way toward factoring
some more of the shared logic out of the two implementations.

It is also making it more obvious how to restructure the loops
themselves to be a bit easier to read (although no different in terms of
functionality).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207095 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Incorporate the core trick of improvements on the naive Tarjan's
algorithm here: http://dl.acm.org/citation.cfm?id=177301.

The idea of isolating the roots has even more relevance when using the
stack not just to implement the DFS but also to implement the recursive
step. Because we use it for the recursive step, to isolate the roots we
need to maintain two stacks: one for our recursive DFS walk, and another
of the nodes that have been walked. The nice thing is that the latter
will be half the size. It also fixes a complete hack where we scanned
backwards over the stack to find the next potential-root to continue
processing. Now that is always the top of the DFS stack.

While this is a really nice improvement already (IMO) it further opens
the door for two important simplifications:

1) De-duplicating some of the code across the two different walks. I've
   actually made the duplication a bit worse in some senses with this
   patch because the two are starting to converge.
2) Dramatically simplifying the loop structures of both walks.

I wanted to do those separately as they'll be essentially *just* CFG
restructuring. This patch on the other hand actually uses different
datastructures to implement the algorithm itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207098 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: port more tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207101 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: implement BFI optimisation

ARM64 was not producing pure BFI instructions for bitfield insertion
operations, unlike AArch64. The approach had to be a little different (in
ISelDAGToDAG rather than ISelLowering), and the outcomes aren't identical but
hopefully this gives it similar power.

This should address PR19424.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207102 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: port bitfield test to ARM64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207103 91177308-0d34-0410-b5e6-96231b3b80d8