[AArch64 costs 5/18] Factor out common MULT cases

gcc/

	* config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
	to...
	(aarch64_strip_extend): ...this, don't strip shifts, check RTX is
	well formed.
	(aarch64_rtx_mult_cost): New.
	(aarch64_rtx_costs): Use it, refactor as appropriate.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210497 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 6/18] Set default costs and handle vector modes.

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210498 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 7/18] Improve SET cost.

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
	for SET RTX.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210499 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 8/18] Cost memory accesses using address costs 

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
	costs when costing loads and stores to memory.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210500 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 9/18] Better cost logical operations

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
	logical operations.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210501 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 10/18] Improve costs for sign/zero extend operations

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
	ZERO_EXTEND and SIGN_EXTEND better.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210502 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 11/18] Improve costs for rotate and shift operations.

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
	rotates and shifts.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210503 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 12/18] Improve costs for sign/zero extracts

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
	SIGN/ZERO_EXTRACT.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210504 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 13/18] Improve costs for div/mod

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
	DIV/MOD.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210505 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 14/18] Cost comparisons, flag setting operators and IF_THEN_ELSE

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
	operators.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210506 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 15/18] Cost more Floating point RTX.

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
	FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210507 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 16/18] Cost TRUNCATE

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210508 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 17/18] Cost for SYMBOL_REF, HIGH and LO_SUM

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
	HIGH, LO_SUM.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210509 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64 costs 18/18] Dump a message if we are unable to cost an insn.

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
	where we were unable to cost an RTX.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210510 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-15  Ed Smith-Rowland  <3dw4rd@verizon.net>
	    Jonathan Wakely  <jwakely@redhat.com>

	PR libstdc++/61166
	* include/bits/parse_numbers.h: Use integral_constant to remove
	duplication and simplify.
	* testsuite/20_util/duration/literals/61166.cc: New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210511 138bc75d-0d04-0410-961f-82ee72b054a4
[Patch, microblaze]: Add optimized lshrsi3

When barrel shifter is not present, the immediate value
is greater than #5 and optimization is -OS, the
compiler will generate shift operation using loop.

Changelog

2013-11-26  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/config/microblaze/microblaze.md: Add size optimized lshrsi3 insn

ChangeLog/testsuite

2014-02-12  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c: New test.

Signed-off-by:Nagaraju <nmekala@xilix.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Add INIT_PRIORITY support

Added TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros.

These macros allows users to control the order of initialization
of objects defined at namespace scope with the init_priority
attribute by specifying a relative priority, a constant integral
expression currently bounded between 101 and 65535 inclusive.

Lower numbers indicate a higher priority.

Changelog

2013-11-26  Nagaraju Mekala <nagaraju.mekala@xilinx.com>

 * gcc/config/microblaze/microblaze.c: Add microblaze_asm_constructor,
   microblaze_asm_destructor. Define TARGET_ASM_CONSTRUCTOR and
   TARGET_ASM_DESTRUCTOR.

Signed-off-by:nagaraju <nmekala@xilix.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Add supervisory call support

A function can be executed in supervisory mode when a function
is declared with svc_handler attribute.

If a function with svc_handler is called, the processor switches
to supervisory mode and executes. After executing the function
it returns to normal mode.

Same feature can also be invoked with svc_table_handler attribute
but this attribute will accept a service ID, to be used for
calling the function.

Signed-off-by:nagaraju <nmekala@xilix.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Added Break handler support

Break handler is used to support a normal hardware break.
This is similar to interrupt_handler except that RTBD should be used instead of RTID.

Signed-off-by:Nagaraju <nmekala@xilix.com>
Signed-off-by:David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Increase max alignment to please the testsuite

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>