Added parsing co-processor names starting with "cr"

Additional compliant GAS names for coprocessor register name
are enabled for all instruction with parameter MCK_CoprocReg:
LDC,LDC2,STC,STC2,CDP,CDP2,MCR,MCR2,MCRR,MCRR2,MRC,MRC2,MRRC,MRRC2

Patch by Andrey Kuharev.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211776 91177308-0d34-0410-b5e6-96231b3b80d8
add ppc64/pwr8 as target
includes handling DIR_PWR8 where appropriate
The P7Model Itinerary is currently tied in for use under the P8Model, and will be updated later.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211779 91177308-0d34-0410-b5e6-96231b3b80d8
Add support for ppc64/power8 as a host



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211781 91177308-0d34-0410-b5e6-96231b3b80d8
Silence a warning due to a comparison between signed and unsigned.

No functional change intended.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211782 91177308-0d34-0410-b5e6-96231b3b80d8
Silencing a warning about isZExtFree hiding an inherited virtual function. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211783 91177308-0d34-0410-b5e6-96231b3b80d8