Input: atmel_mxt_ts: implement device tree parsing

If platform data is missing, and the device was instantiated via device
tree, parse the DT to generate the platform data.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: add touchpad to Venice2 DT

The touchpad is an Atmel MXT device. The device may show up in bootloader
mode if reset by SW, or if configuration/firmware is missing. Or, it may
present itself as the final touchpad device. These modes have different
I2C addresses, and hence different I2C nodes.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: disable Atmel MXT bootloader node

I think this isn't needed...

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: enable Atmel touchpad in defconfig

This driver is used on Venice2 for the touchpad.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: add light sensor to Venice2 DT

FIXME:
dmesg|grep -i isl
[    1.765974] isl29018 1-0044: No cache defaults, reading back from HW
[    1.772624] isl29018 1-0044: regmap initialization failed: -121
[    1.778637] isl29018: probe of 1-0044 failed with error -121

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: jetson-tk1: don't set mux func for GPIOs

When a Tegra pin is configured as a GPIO, the selected mux function is
irrelevant. Since we don't need to set the function for those pins,
don't do it!

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: update Venice2 pinmux

This re-imports the entire Venice2 pinmux data from the board's master
spreadsheet, thus tieing it to the primary definition of what is correct
for this board.

This also applies the same change as the previous patch does for Jetson
TK1: When a Tegra pin is configured as a GPIO, the selected mux function
is irrelevant. Since we don't need to set the function for those pins,
don't do it!

Signed-off-by: Stephen Warren <swarren@nvidia.com>
mmc: tegra: disable UHS modes

Program TEGRA_SDHCI_VENDOR_MISC_CTRL so that UHS modes aren't advertised
in SDHCI_CAPABILITIES_1.  While the Tegra SDHCI controller does support
these modes, they require Tegra-specific tuning and calibration routines
which the driver does not support yet.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
mmc: tegra: fix reporting of base clock frequency

Tegra SDHCI controllers, by default, report a base clock frequency
of 208Mhz in SDHCI_CAPABILTIES which may or may not be equal to the
actual base clock frequency.  While this can be overridden by setting
BASE_CLK_FREQ in VENDOR_CLOCK_CTRL on Tegra30 and later SoCs, just
set SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN and supply a get_max_clock()
callback to get the actual rate of the base clock.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: rebuild tegra_defconfig on next-20140424

This makes it easier to create isolated defconfig patches

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Rebuild multi_v7_defconfig on next-20140507

Signed-off-by: Stephen Warren <swarren@nvidia.com>
LOCAL HACK: tegra_defconfig changes

Signed-off-by: Stephen Warren <swarren@nvidia.com>
WIP: ARM: tegra: venice2 WiFi

Signed-off-by: Stephen Warren <swarren@nvidia.com>