LEON3: add support for IRQ16..31 for CPU!=0
LEON3: coding style clean bsp_irq_fixup()
SPARC: syscall optimizations and PSR-write fix

The last optimization missed was incorrect in regards to
PSR write instruction delay must be 3 instructions.

New optimizations:
 * align to 32-byte cache line.
 * rearrange code into three "blocks" of 4 instructions that
   is executed by syscall 2 and 3. This is to optimize for
   16/32 byte cache lines.
 * use delay-slot instruction in trap table to reduce by one
   instruction.
 * use the fact that "wr %PSR" implements XOR to reduce by
   one instruction.