x86: UV BAU and nodes with no memory

This patch fixes BAU initialization for systems containing
nodes with no memory and for systems with non-consecutive
node numbers.

Fixes and clarifies situations where pnode should be used instead
of node id.

Tested on the UV hardware simulator.

Signed-off-by: Cliff Wickman <cpw@sgi.com>
LKML-Reference: <E1LpjX3-00007N-12@eag09.americas.sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
x86: UV BAU messaging timeouts

This patch replaces a 'nop' uv_enable_timeouts() in the
UV TLB shootdown code. (somehow, long ago that function got
eviscerated)

If any cpu in the destination node does not get interrupted by the
message and post completion in a reasonable time the hardware
should respond to the sender with an error.  This function
enables such timeouts.

Tested on the UV hardware simulator.

Signed-off-by: Cliff Wickman <cpw@sgi.com>
LKML-Reference: <E1LpjXU-00007e-Qh@eag09.americas.sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
x86, UV: system table in bios accessed after unmap

Use the copy of UV system table in kernel memory, not the one in
bios after unmapping.

Signed-off-by: Russ Anderson <rja@sgi.com>
LKML-Reference: <20090330225240.GA22776@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
x86, UV: Fix for nodes with memory and no cpus

Fix initialization of UV blade information for systems that have
nodes with memory but no cpus.

Signed-off-by: Jack Steiner <steiner@sgi.com>
LKML-Reference: <20090330140111.GA18461@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
powerpc: Fix tlbilx opcode

The tlbilx opcode was not matching the Power ISA 2.06 arch spec.
The old opcode was an early suggested opcode that changed during the
2.06 architecture process.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc: Add support for early tlbilx opcode

During the ISA 2.06 development the opcode for tlbilx changed and some
early implementations used to old opcode.  Add support for a MMU_FTR
fixup to deal with this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/85xx: TQM85xx: correct address of LM75 I2C device nodes

Commit 0f73a449a649acfca91404a98a35353a618b9555 added I2C device nodes
for the LM75 thermal sensor on the TQM85xx modules, unfortunately with
the wrong I2C address. The LM75s are located at address 0x48.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/85xx: TQM8548: use proper phy-handles for enet2 and enet3

For enet2 and enet3 the wrong phy-handles have been used in DTS files
of the TQM8548 modules.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/85xx: TQM8548: update defconfig

Enable highmem support for the TQM8548-AG modules and NAND support for
the TQM8548-BE modules. Furthermore disable USB, Wireless and IDE support
because it's not available on the STK85xx starter kit.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/mm: Fix compile warning

arch/powerpc/mm/tlb_nohash.c: In function 'flush_tlb_mm':
arch/powerpc/mm/tlb_nohash.c:128: warning: unused variable 'cpu_mask'

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc: Document new FSL I2C bindings and cleanup

This patch documents the new bindings for the MPC I2C bus driver.
Furthermore, it removes obsolete FSL device related definitions
for I2C.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
x86: prevent /sys/firmware/sgi_uv from being created on non-uv systems

/sys/firmware/sgi_uv should only be created on uv systems.

Signed-off-by: Russ Anderson <rja@sgi.com>
LKML-Reference: <20090403222423.GA28546@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
x86, uv: add Kconfig dependency on NUMA for UV systems

Impact: build fix

Add Kconfig dependency on NUMA for enabling UV. Although it might
be possible to configure non-NUMA UV systems, they are unsupported
and not interesting. Much of the infrastructure for UV requires
NUMA support.

Signed-off-by: Jack Steiner <steiner@sgi.com>
LKML-Reference: <20090403203942.GA20137@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
[ARM] pxa/colibri: fix missing variable name in inline functions

Even they are empty inline functions, the compiler still complains
about the missing variable names.

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Cc: Daniel Mack <daniel@caiaq.de>
forcedeth: Use napi_complete() not __napi_complete().

It's not enough that forcedeth's interrupts are disabled,
local cpu interrupts have to unconditionally be off
when we remove the device from the poll list.

Based upon a crash report from
Alexander Beregalov <a.beregalov@gmail.com>:

 WARNING: at lib/list_debug.c:30 __list_add+0x89/0x90()
 Hardware name:
 list_add corruption. prev->next should be next (c06ea834), but was
f70244c8. (prev=c06ea834).
 Modules linked in: w83627hf hwmon_vid i2c_nforce2
 Pid: 1436, comm: portageq Not tainted 2.6.30-rc1 #1
 Call Trace:
  [<c0129d73>] warn_slowpath+0x73/0xd0
  [<c03c6008>] ? __kfree_skb+0x38/0x90
  [<c03f9b06>] ? tcp_data_snd_check+0x26/0xe0
  [<c03fd67f>] ? tcp_rcv_established+0x2bf/0x5e0
  [<c040557a>] ? tcp_v4_rcv+0x47a/0x610
  [<c014cebd>] ? print_lock_contention_bug+0x1d/0x110
  [<c044a967>] ? _spin_unlock+0x27/0x50
  [<c040564b>] ? tcp_v4_rcv+0x54b/0x610
  [<c02d86f9>] __list_add+0x89/0x90
  [<c03ccff9>] __napi_schedule+0x29/0x60
  [<c036946d>] e1000_intr+0xbd/0x1a0
  [<c015c5de>] handle_IRQ_event+0x3e/0x120
  [<c015e190>] handle_fasteoi_irq+0x60/0xd0
  [<c0104fd4>] handle_irq+0x34/0x60
  [<c015f748>] ? rcu_irq_enter+0x8/0x40
  [<c0104b29>] do_IRQ+0x39/0xa0
  [<c03c592c>] ? skb_release_head_state+0x2c/0x60
  [<c01034ee>] common_interrupt+0x2e/0x34
  [<c02d8601>] ? list_del+0x21/0x90
  [<c014e54b>] ? trace_hardirqs_on+0xb/0x10
  [<c03cd4da>] __napi_complete+0x1a/0x30
  [<c0381971>] nv_napi_poll+0xd1/0x5c0
  [<c014e54b>] ? trace_hardirqs_on+0xb/0x10
  [<c03cd5f6>] net_rx_action+0x106/0x1b0
  [<c012e8df>] __do_softirq+0x6f/0x100
  [<c044a967>] ? _spin_unlock+0x27/0x50
  [<c015e1b8>] ? handle_fasteoi_irq+0x88/0xd0
  [<c012e9cd>] do_softirq+0x5d/0x70
  [<c012ebad>] irq_exit+0x7d/0xa0
  [<c0104b32>] do_IRQ+0x42/0xa0
  [<c012e9b7>] ? do_softirq+0x47/0x70
  [<c01034ee>] common_interrupt+0x2e/0x34

Signed-off-by: David S. Miller <davem@davemloft.net>
ASoC: magician: remove un-necessary #include of pxa-regs.h and hardware.h

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
ASoC: Disable S3C64xx support in Kconfig

Due to the process and communications issues with the 2.6.30 S3C
platform merges none of the underlying arch/arm code for S3C64xx audio
support made it into mainline, rendering the drivers useless.  Disable
them in Kconfig to avoid user confusion - users patching in the required
support can always reenable this too.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[ALSA] hda_intel: fix unexpected ring buffer positions

I found two issues with ICH7-M (it should be related to other HDA chipsets
as well):

- the ring buffer position is not reset when stream restarts (after xrun) -
  solved by moving azx_stream_reset() call from open() to prepare() callback
  and reset posbuf to zero (it might be filled with hw later than position()
  callback is called)
- irq_ignore flag should be set also when ring buffer memory area is not
  changed in prepare() callback - this patch replaces irq_ignore with
  more universal check based on jiffies clock

Signed-off-by: Jaroslav Kysela <perex@perex.cz>
[ALSA] pcm-midlevel: Add more strict buffer position checks based on jiffies

Some drivers like Intel8x0 or Intel HDA are broken for some hardware variants.
This patch adds more strict buffer position checks based on jiffies when
internal hw_ptr is updated. Enable xrun_debug to see mangling of wrong
positions.

As a side effect, the hw_ptr interrupt update routine might do slightly better
job when many interrupts are lost.

Signed-off-by: Jaroslav Kysela <perex@perex.cz>
x86, CPA: Change idmap attribute before ioremap attribute setup

Change the identity mapping with the requested attribute first, before
we setup the virtual memory mapping with the new requested attribute.

This makes sure that there is no window when identity map'ed attribute
may disagree with ioremap range on the attribute type.

This also avoids doing cpa on the ioremap'ed address twice (first in
ioremap_page_range and then in ioremap_change_attr using vaddr), and
should improve ioremap performance a bit.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
LKML-Reference: <20090409212708.373330000@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>