qup_i2c: set up node before calling of_i2c_register_devices

Device-tree framework for I2C expects adapter of device's
of_node to be initialized before adding I2C slave devices
on the bus.

Change-Id: I64af0b6bafb71ec94ad5acfe3034e9be887ebc47
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
qup_i2c: turn off the ahb clock conditionally

Each GSBI has QUP-I2C and UART cores which can be
used independently. However, the AHB clock is
shared by these blocks. So we keep it on if the
cores are used independently from different processors.

CRs-Fixed: 387908
Change-Id: I84f96cc6dd4873d96437884d18c911e4cf2bfd51
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
qup_i2c: Add runtime PM support to I2C QUP controller

Runtime PM is used to turn clocks on and off when the
controller is not in use. When the controller is used
for messaging, pm_runtime_get_sync is called before
sending the message. pm_runtime_mark_last_busy and
pm_runtime_put_autosuspend are called when message
is sent and/or response is received.

Change-Id: I970def8eb601f7beb8ac256ed1496ddd48ca1257
CRs-Fixed: 406910
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>

Conflicts:
	drivers/i2c/busses/i2c-qup.c
qup_i2c: Manage gpio configuration from runtime pm

Due to gpio_request and gpio_free calls are made from
multiple places in i2c driver code and can cause erroneous
condition where same gpios are assigned/freed multiple times.

Move the gpio reques/free calls under runtime pm to
manage better.

CRs-Fixed: 432971
Change-Id: Ic44202e0743fa56806a0612243d3b800bad1433f
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
qup_i2c: Set parent device to enable runtime PM support for clients

Register the current device as parent of the adaptor device in order to
allow the client drivers to use runtime PM.  Client drivers can vote to
enable and disable clocks as needed.

Change-Id: Ie2d6b96ab0cbe5af56b4da0f5f18b37d0495e053
Acked-by: Christian Bolis <cbolis@qti.qualcomm.com>
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
i2c_qup: always set rate and log a message when fail

Clock set rate is failing silently when clock rate is not
available. Additionally clock rate is not set when no rate
is specified in platform data. This patch always set the
clock's rate and logs a message if it fails to set rate
or if no rate is set by platfrom data.

CRs-Fixed: 452047
Change-Id: I0551a12ca2861f8e1a48ee344d6ffcf898c96971
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>

Conflicts:
	drivers/i2c/busses/i2c-qup.c
qup_i2c: Avoid potential panic issue

I2c register access is happening in isr before PM runtime
status check. This can lead to potential hang because of
unwanted interrupts and i2c clocks are off.

Update the i2c driver code to have register access
after PM runtime status check.

CRs-Fixed: 454710
Change-Id: I11a3d8df24c514205203f24be8e08d7c1ea1a7b8
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
qup_i2c: Use separate variables to store i2c gpios settings

In i2c bus recovery function GPIO settings for both
SCL and SDA are stored in one variable in this order
before writing recovery settings.
So, SCL setting is overwritten with SDA setting.
And when saved gpios settings write it back after
recovery, the setting for SDA is written both on SCL and SDA.
It means the setting of SCL is broken.

Use separate instances of variables to store GPIO settings
of SDA and SCL separately

CRs-Fixed: 447585
Change-Id: I7014a5b12d4c7ef41fd28c543834d45c619695a9
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
qup_i2c: Update clock ready check condition

While doing i2c transfer that involved write and
immediate read, the driver will put the controller
to RESET and do an immediate read before the write completes.
This issue is hard to produce internally because clock stretch
from slave device is involved during the failure time. CLK
state in QUP status register will be FORCED_LOW_STATE.

O/p fifo empty check added to determine clock idle.

CRs-Fixed: 455743
Change-Id: I51c1d9f9de42381fc85710e9185aa4177f6cd302
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>